Renesas M3A-HS64, Руководство пользователя

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M3A-HS64 Functions
2.3.6 External EEPROM Interface
Rev. 1.00 Apr 30, 2009
2-20
REJ11J0034-0100
2
2.3.6 External EEPROM Interface
The M3A-HS64 comes standard with an EEPROM listed in the table below. The EEPROM is controlled by the IIC bus interface 3
(IIC3) built in the SH7264.
The EEPROM is write-protected or write-enabled by system setting DIP switches.
The figure below shows the EEPROM Interface Block Diagram. Table 2.3.12 lists the DIP switches setting (SW6-4), and Table
2.3.13 lists the jumpers setting (JP8, and JP9).
Table 2.3.11 EEPROM Specifications
Part Number Interface Capacity Package
HN58X24128FPIE 2-wire serial (IIC) 16 KB (16 kwords x 8-bit) 8-pin, SOP
SH7264
HN58X24128FPIE
16 KB
(16 K words × 8-bit)
WP
PE3/ SDA1 /IRQ3
DIP
SW6-4
SDA
SCL PE2/ SCL1 /IRQ2
3.3 V
3.3 V
3.3 V
A2-0
2
IIC of the D/A converter (M3A-HS64G01),
IRQ input (M3A-HS64G02)
Expansion connector
JP8
JP9
Chip address: 000
Note: Pin names in red indicate the function used.
Figure 2.3.7 EEPROM Interface Block Diagram
Table 2.3.12 DIP Switches Setting (SW6-4)
Function
Number
OFF (High) ON (Low)
SW6-4 EEPROM is write-protected EEPROM is write-enabled (default)
Table 2.3.13 Jumpers Setting (JP8, and JP9)
Number
1-2 None (Open)
JP8
IIC3 mode (PE2 is SCL1 output pin, default) IRQ mode (PE2 is IRQ2 input pin)
JP9
IIC3 mode (PE3 is SDA1 I/O pin, default) IRQ mode (PE3 is IRQ3 input pin)