M3A-HS64 Functions
2.3.4 NAND Flash Memory Interface
Rev. 1.00 Apr 30, 2009
2-17
REJ11J0034-0100
2
2.3.4 NAND Flash Memory Interface
The M3A-HS64 comes standard with an NAND flash memory listed in the table below.
NAND flash memory works at 8-bit mode, and 3.3 V-only single power supply. It is write-protected or write-enabled by system
setting DIP switches.
The SH7264 NAND flash memory controller pin (FLCTL) is also used as the data bus (D15 to D4) and the channel 0 pin of the
Renesas Serial Peripheral Interface (RSPI). When connecting it with NAND flash memory, set SW5-5 to OFF. The figure below
shows the NAND flash memory block diagram. Table 2.3.8 lists the DIP switches setting (SW5-5, and SW6-2).
Table 2.3.7 NAND Flash Memory Specifications
Part Number
Bus Size
Capacity
Access Time
K9F2G08U0A-PCB0 8-bit
256 MB
(8-bit x 256 M Words x 1)
Random: 25
μ
s (max.)
Page: 25 ns (min.)
K9F2G08U0A
256 MB
(256 M Words × 8-bit)
SH7264
8
WE#
I/O7-I/O0
PD15-PD8/D15-D8/
NAF7-NAF0
PF9/A23/RSPCK0/
FRB
D1
S1A
S1B
D2
S2A
S2B
D3
S3A
S3B
D4
S4A
S4B
MUX
EN#
IN
Device connected to RSPI
ALE
CLE
R/B#
CE#
RE#
3.3 V
4
PF10/A24/SSL00/
FCE#
PF11/MOSI0/TIOC3C/SPDIF_IN
PF12/MISO0/TIOC3D/SPDIF_OUT
PD7/D7/
FWE#
PD6/D6/
FALE
PD5/D5/
FCLE
PD4/D4/
FRE#
WP#
DIP
SW6-2
3.3 V
DIP
SW5-5
3.3 V
NAND
or RSPI
Data bus
NOR flash memory
2
3.3 V
3.3 V
3.3 V
Note: Pin names
in red
indicate the function used.
Figure 2.3.5 NAND Flash Memory Block Diagram
Содержание M3A-HS64
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