Realtek RTD2120K, Руководство пользователя

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Realtek RTD2120-series
confidential 24
0: Disable
1: Enable
A_DBN_EN 1 R/W 1 ADC DDC De-bounce Enable
0: Disable
1: Enable (with crystal/4)
A_DDC_EN 0 R/W 0 ADC DDC Channel Enable Bit
0: MCU access Enable
1: DDC channel Enable
Register::ADC_DDC_control 0xFF21
Name Bits Read/Write Reset State Comments
A_DBN_CLK
_SEL 7:6 R/W 0 De-bounce clock divider
00: 1/1 reference clock
01: 1/2 reference clock
1X: 1/4 reference clock
A_STOP_DB
N_SEL 5:4 R/W 0 De-bounce sda stage
0X: latch one stage
10: latch two stage
11: latch three stage
A_SYS_CK_S
EL 3 R/W 0 De-bounce reference clock
0: crystal clock
1: PLL clock
A_DDC2 2 R/W 0 Force to ADC DDC to DDC2 mode
0: Normal operation
1: DDC2 is active
RST_A_DDC 1 R/W 0 Reset ADC DDC circuit
0: Normal operation
1: reset (auto cleared)
RVT_A_DDC
1_EN 0 R/W 0 ADC DDC revert to DDC1 enable(SCL idle
for 128 VSYNC)
0: Disable
1: Enable
Register::DVI_DDC_enable 0xFF23
Name Bits Read/Write Reset State Comments
D_DDC_ADD
R 7:5 R/W 0 DVI DDC Channel Address Least
Significant 3 Bits
(The default DDC channel address MSB 4
Bits is
“
A
”
)
reserved 4 -- 0 Reserved
D_DDC_W_S
TA 3 R/W 0 DVI DDC External Write Status (for external
DDC access only)
It is cleared after write.
D_DDCRAM
_W_EN 2 R/W 0 DVI DDC External Write Enable (for
external DDC access only)
0: Disable
1: Enable
D_DBN_EN 1 R/W 1 DVI DDC Debounce Enable
0: Disable
1: Enable (with crystal/4)