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21
RCAT-1A Rev A3 Designer’s manual
Serious Power for the Serious Designer
ADC AREF
Most applications will do fine using the CPU’s internal Vref for analog to digital conversion. For those
applications requiring an external reference, access to the AREF is provided as shown in the schematic below.
Schematic
Figure 16
Please consult the ATMega™ datasheet for details on the proper implementation of this input.
JTAG
If you are using an in-circuit-emulator (ICE) like the Atmel ATATMEL-ICE™, which we highly
recommend, the JTAG interface connector J4 (shown below) provides a simple plug -in point for
the ICE. If you are done with or are not otherwise using the connector for ICE or other JTAG
purposes, then CPU ports PF4-PF7 are available to your application. Note that Vcc, Gnd and CPU
/RST are also accessible via J4.
Schematic
Figure 17