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C
C
Appendix C:
Interrupts and DMA
Channels
Interrupts
The assignment of interrupts for the EPC is shown in the following table:
NMI
DRAM parity error, EXM expansion interface I/O channel check
IRQ0
timer
IRQ1
keyboard
IRQ2
IRQ8 - IRQ15 cascade through IRQ2
IRQ3
COM2 serial port
IRQ4
COM1 serial port
IRQ5
unassigned
IRQ6
usually needed for floppy disk controller
IRQ7
unassigned
IRQ8
clock
IRQ9
unassigned
IRQ10 watchdog timer (for Flash/SRAM option)
IRQ11 unassigned
IRQ12 unassigned
IRQ13 coprocessor
IRQ14 used by optional IDE disk controller
IRQ15 unassigned
Содержание EPC-26A/27
Страница 5: ...EPC 26A 27 Hardware Reference Page iv NOTES...
Страница 27: ...BIOS Configuration 2 2 Page 21 NOTES...
Страница 35: ...EPC 26A 27 Hardware Reference Page 28 3 3 NOTES...
Страница 45: ...EPC 26A 27 Hardware Reference Page 38 5 5 NOTES...
Страница 51: ...EPC 26A 27 Hardware Reference Page 44 6 6 NOTES...
Страница 56: ...Page A1 A A Appendix A Mechanical Dimensions Figure 8 EPC Mechanical Dimensions...
Страница 57: ...EPC 26A 27 Hardware Reference Page A2 A A NOTES...
Страница 58: ...Page A1 A A Appendix A Mechanical Dimensions Figure 8 EPC Mechanical Dimensions...
Страница 59: ...EPC 26A 27 Hardware Reference Page A2 A A NOTES...
Страница 64: ...Appendix B Chip Set I O Map Page B5 B B...