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6
6
6. Programming
Interface
Registers
This chapter contains information needed to write custom software drivers for
the EPC’s Flash or SRAM. If using the supplied software that supports Flash
or SRAM as a disk device, skip this chapter. The EPC-26A/27 defines the
following registers in the I/O space.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
I/O port
Device
ID
Reg
1 1 1 1 1 1 0 1 100
Config
Option
Byte
1
Reg
x x x x x x 0
Cden
102
Low Address Register
Low Order Bits 0-7 of Flash/SRAM Address
8380
Middle Address Register
Low-Middle Bits 8-15 of Flash/SRAM Address
8381
Middle Address Register
High-Middle Bits 16-23 of Flash/SRAM Address
8382
Flash Data Access
8383
SRAM
Data
Access
8384
Reserved
8385
High Address Register
High Order Bits 24-31 of Flash/SRAM Address
8386
Battery
Status
x x x x x x x
Batt ok
8387
Figure 8. Flash/SRAM Registers.
The first two registers are standard read/write EXM registers for device
identification and configuration. The EPC-26A/27 responds to accesses to
ports 100h and 102h only if its EXM expansion interface line -EXMID is as-
Содержание EPC-26A/27
Страница 5: ...EPC 26A 27 Hardware Reference Page iv NOTES...
Страница 27: ...BIOS Configuration 2 2 Page 21 NOTES...
Страница 35: ...EPC 26A 27 Hardware Reference Page 28 3 3 NOTES...
Страница 45: ...EPC 26A 27 Hardware Reference Page 38 5 5 NOTES...
Страница 51: ...EPC 26A 27 Hardware Reference Page 44 6 6 NOTES...
Страница 56: ...Page A1 A A Appendix A Mechanical Dimensions Figure 8 EPC Mechanical Dimensions...
Страница 57: ...EPC 26A 27 Hardware Reference Page A2 A A NOTES...
Страница 58: ...Page A1 A A Appendix A Mechanical Dimensions Figure 8 EPC Mechanical Dimensions...
Страница 59: ...EPC 26A 27 Hardware Reference Page A2 A A NOTES...
Страница 64: ...Appendix B Chip Set I O Map Page B5 B B...
