LTE-A Module Series
EM12-G Hardware Design
EM12-G_Hardware_Design 15 / 62
2.3. Functional Diagram
The following figure shows a block diagram of EM12-G.
Baseband
PMIC
T
ra
n
sce
ive
r
ANT_MAIN
ANT_GNSS
ET
VCC
RESET#
38.4MHz
XO
C
o
n
tr
o
l
QLINK
Control
Tx
PRx
DRx
PC
I
Ex
p
re
s
s
M
.2
K
e
y
-B
I
n
te
rfa
c
e
FULL_CARD_POWER_OFF#
W_DISABLE1#
USB2.0&USB3.0
(U)SIM1&(U)SIM2
WWAN_LED#
WAKE_ON_WAN#
NAND +
DDR2 SDRAM
PCM
W_DISABLE2#
GPIOs
Tx
/R
x
Bl
o
cks
ANT_DIV
PCIE*
Figure 1: Functional Diagram
2.4. Evaluation Board
In order to help customers develop applications conveniently with EM12-G, Quectel supplies the
evaluation board (M.2 EVB), USB to RS-232 converter cable, USB type-C cable, earphone, antenna and
other peripherals to control or test the module. For more details, please refer to
document [1]
.