
LTE Module Series
EG95 Hardware Design
EG95_Hardware_Design 23 / 81
open.
SPI_MISO
28
DI
Master input slave
output of SPI
interface
V
IL
min=-0.3V
V
IL
max=0.6V
V
IH
min=1.2V
V
IH
max=2.0V
1.8V power domain.
If unused, keep it
open.
RF Interface
Pin Name
Pin No.
I/O Description
DC Characteristics
Comment
ANT_GNSS
49
(EG95-
NA)
AI
GNSS antenna pad
50Ω impedance.
If unused, keep it
open.
Pin 49 is defined as
ANT_DIV on EG95-E.
ANT_DIV
49
(EG95-E)
AI
Receive diversity
antenna pad
50Ω impedance.
If unused, keep it
open.
ANT_DIV
56
(EG95-
NA)
AI
Receive diversity
antenna pad
50Ω impedance.
If unused, keep it
open.
Pin 56 is reserved on
EG95-E.
ANT_MAIN
60
IO
Main antenna pad
Other Pins
Pin Name
Pin No. I/O Description
DC Characteristics
Comment
CLK_OUT
25
DI
Clock output
Provide a digital clock
output for an external
audio codec.
If unused, keep this
pin open.
AP_READY
19
DI
Application
processor sleep
state detection
V
IL
min=-0.3V
V
IL
max=0.6V
V
IH
min=1.2V
V
IH
max=2.0V
1.8V power domain.
If unused, keep it
open.
USB_BOOT
75
DI
Force the module to
enter into
emergency
download mode
V
IL
min=-0.3V
V
IL
max=0.6V
V
IH
min=1.2V
V
IH
max=2.0V
1.8V power domain.
If unused, keep it
open.
RESERVED Pins
Pin Name
Pin No.
I/O Description
DC Characteristics
Comment