PCM_OUT
PCM_SYN
PCM_CLK
I2C_SCL
I2C_SDA
Clock and m
short sync d
command
A
The followin
1. It is re
PCM_C
2. EC25 w
NOTES
E
T 25
NC 26
K 27
41
42
mode can be
data format w
AT+QDAI
for
ng figure sho
P
PC
PCM
PC
I2
I2
Modul
Figure
ecommended
CLK.
works as a m
EC25-A_Us
DO
IO
IO
OD
OD
e configured
with 2048kH
r details.
ows the refe
PCM_IN
M_OUT
M_SYNC
CM_CLK
2C_SCL
2C_SDA
le
1.8V
e 24: Refere
d to reserve
master devic
ser_ManualC
PCM d
PCM d
PCM d
I2C ser
I2C ser
d by AT com
HzPCM_CLK
erence desig
4.
7K
4.
7K
ence Circui
e RC (R=2
ce pertaining
Confidentia
ata output
ata frame sy
ata bit clock
rial clock
rial data
mmand, and
K and 8kHz
gn of PCM in
BCLK
LRCK
DAC
ADC
SCL
SDA
t of PCM A
2ohm, C=2
g to I2C inte
al / Release
ync signal
k
the default
PCM_SYNC
nterface with
MI
L
Codec
pplication w
2pF) circuit
rface.
d 40 / 6
1.8V powe
1.8V powe
1.8V powe
Require e
Require e
configuratio
C. Refer to
d
h external co
CBIAS
INP
INN
LOUTP
LOUTN
with Audio
t on the PC
L
EC25-AU
69
er domain
er domain
er domain
external pull-
external pull-
on is master
document [
odec IC.
BI
AS
Codec
CM lines, e
LTE Module
ser Manua
-up to 1.8V
-up to 1.8V
mode using
[2]
about the
specially fo
e
al
g
e
r
All manuals and user guides at all-guides.com
all-guides.com