Quatech DS-202, Руководство пользователя

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FUNCTIONAL DESCRIPTION
+--------------------+----------+----------------------+
| IID2 IID1 IID0 IP | Priority | Interrupt Type |
+--------------------+----------+----------------------+
| x x x 1 | N/A | None |
| 0 1 1 0 | Highest | Receiver Line Status |
| 0 1 0 0 | Second | Received Data Ready |
| 1 1 0 0 | Second | Character Timeout |
| | | (FIFO mode only)
* |
| 0 0 1 0 | Third | Transmitter Holding |
| | | Register Empty |
| 0 0 0 0 | Fourth | MODEM Status |
+--------------------+----------+----------------------+
Figure 3. Interrupt Identification bit definitions.
Receiver Line Status:
I n d i c a t e s o v e r r u n , p a r i t y , f r a m i n g e r r o r s o r
b r e a k i n t e r r u p t s . T h e i n t e r r u p t i s c l e a r e d b y
reading the line status register.
Received Data Ready:
I n d i c a t e s r e c e i v e d a t a a v a i l a b l e . T h e i n t e r r u p t
is cleared by reading the receive buffer.
FIFO mode: *
I n d i c a t e s t h e r e c e i v e r F I F O t r i g g e r l e v e l h a s
b e e n r e a c h e d . T h e i n t e r r u p t i s r e s e t w h e n t h e
FIFO drops below the the trigger level.
Character Timeout: (FIFO mode only)
*
I n d i c a t e s n o c h a r a c t e r s h a v e b e e n r e m o v e d f r o m
o r i n p u t t o t h e r e c e i v e r F I F O f o r t h e l a s t f o u r
c h a r a c t e r t i m e s a n d t h e r e i s a t l e a s t o n e
c h a r a c t e r i n t h e r e c e i v e r F I F O . T h e i n t e r r u p t
is cleared by reading the receiver FIFO.
Transmitter Holding Register Empty:
I n d i c a t e s t h e t r a n s m i t t e r h o l d i n g r e g i s t e r i s
e m p t y . T h e i n t e r r u p t i s c l e a r e d b y r e a d i n g t h e
i n t e r r u p t i d e n t i f i c a t i o n r e g i s t e r o r w r i t i n g t o
the transmitter holding register.
MODEM Status:
I n d i c a t e s c l e a r t o s e n d , d a t a s e t r e a d y , r i n g
i n d i c a t o r , o r d a t a c a r r i e r d e t e c t h a v e c h a n g e d
s t a t e . T h e i n t e r r u p t i s c l e a r e d b y r e a d i n g t h e
MODEM status register.
* with optional 16550.