Quantum DLTtape DLT 4000, Руководство по эксплуатации продукта

Страница: 80 / 300

SCSI Description
3-18 Quantum DLT 4000 Tape Drive
The COMMAND, DATA, STATUS, and MESSAGE phases are known as the
Information Transfer Phases because they are used to transfer data or control
information.
The C/D, I/O, and MSG signals are used to distinguish between the different
information transfer phases (Table 3
− 5). The drive asserts these three signals
and so controls all information transfer phase changes. The drive can also cause
a BUS FREE phase by releasing the MSG, C/D, I/O, and BSY signals. The
initiator can request a MESSAGE OUT phase by asserting the ATN signal.
The information transfer phases use one or more REQ/ACK handshakes to
control the information transfer. Each REQ/ACK handshake allows the transfer
of one byte of information. During the information transfer phases, the BSY
signal remains true and the SEL signal remains false. Additionally, the drive
continuously envelopes the REQ/ACK handshake(s) with the C/D, I/O, and
MSG signals in such a manner that these control signals are valid for one bus
settle delay before the assertion of the REQ signal of the first handshake and
remain valid after the negation of the ACK signal at the end of the handshake of
the last transfer of the phase.
After the negation of the ACK signal of the last transfer of the phase, the drive
can prepare for a new phase by asserting or negating the C/D, I/O, and MSG
signals. These signals can be changed together or individually. They can be
changed in any order and can be changed more than once (although each line
should change only once). A new phase does not begin until the REQ signal is
asserted for the first byte of the new phase.
A phase ends when the C/D, I/O, or MSG signal changes after the negation of
the ACK signal. The time between the end of a phase and the assertion of the
REQ signal beginning a new phase is undefined. An initiator is allowed to
anticipate a new phase based on the previous phase, the expected new phase,
and early information provided by changes in the C/D, I/O, and MSG signals.
However, the anticipated phase is not valid until the REQ signal is asserted at
the beginning of the next phase.
Information Transfer Direction
True I/O Signal: from drive to initiator
False I/O Signal: from initiator to drive