QDI Advance 12 Series, Руководство пользователя

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Manual for Advance 12 series
Advanced Chipset Features Setup
Figure-5 Advanced Chipset Features Setup Menu
The following indicates the options for each item and describes their meaning.
Item Option Description
l DRAM Clock/Drive Press Enter Enters to set the items about DRAM.
Control
l DRAM Clock Host Clk DDR clock is the double of host clock.
Hclk+33M DDR clock is faster than the double of host clock
by 66MHz.
Hclk-33M DDR clock is slower than the double of host clock
by 66MHz.
By SPD DDR clock is defined by SPD.
l DRAM Timing By SPD DDR Timing is defined by SPD.
Manual Sets DDR Timing manually.
l SDRAM Cycle 2 Defines the CLT parameter of DDR.
Length 2.5
3 Latency Time = 2 /2.5/3 clocks.
l Bank Interleave Disabled Disables DDR Bank Interleave.
4Bank Sets Bank Interleave as 4 bank.
2Bank Sets Bank Interleave as 2 bank.
l AGP&P2P Press Enter Enters to set the following items.
Bridge Control
l AGP Aperture Size 4~256M Sets the effective size of the Graphics Aperture
to be used in the particular PAC Configuration.
l AGP Mode 1x,2x Supports AGP 1x, 2x or 4x mode.
4x
l AGP Driving Auto The default setting is recommended.
Control Manual
l AGP Driving 0000-00FF Sets this item when the AGP 4x card runs
Value
incorrectly.
Chapter 3