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VFD Driver/Controller IC

PT6315

PT6315 v2.0

Page 3

Sep. 2002

PIN CONFIGURATION 44PIN LQFP

Figure 2: PT6315 LQFP Pin Configuration

SG24/GR5

SG23/GR6

SG22/GR7

SG21/GR8

SG20/GR9

LED1

LED2
LED3
LED4

OSC

DOUT

DIN

CLK

STB

K1
K2

SG19/GR10
SG18/GR11
SG17/GR12

VEE

SG16/KS16
SG15/KS15
SG14/KS14
SG13/KS13
SG12/KS12

SG11/KS11

SG10/KS10

VSS

VDD

SG1/KS1

SG2/KS2

SG3/KS3

SG4/KS4

SG5/KS5

SG6/KS6

SG7/KS7

SG8/KS8

SG9/KS9

VSS

VDD

GR1

GR2

GR3

GR4

Содержание PT6315

Страница 1: ...a highly reliable peripheral device for a single chip micro computer Serial data is fed to PT6315 via a three line serial interface It is housed in a 44 pin SSOP and LQFP Package FEATURES CMOS Techno...

Страница 2: ...15 PT6315 v2 0 Page 2 Sep 2002 BLOCK DIAGRAM Figure 1 PT6315 Internal Block Diagram SG1 KS1 SG2 KS2 SG3 KS3 SG4 KS4 SG5 KS5 SG6 KS6 SG7 KS7 SG8 KS8 SG9 KS9 SG10 KS10 SG11 KS11 SG12 KS12 SG13 KS13 SG14...

Страница 3: ...2 PT6315 LQFP Pin Configuration SG24 GR5 SG23 GR6 SG22 GR7 SG21 GR8 SG20 GR9 LED1 LED2 LED3 LED4 OSC DOUT DIN CLK STB K1 K2 SG19 GR10 SG18 GR11 SG17 GR12 VEE SG16 KS16 SG15 KS15 SG14 KS14 SG13 KS13 S...

Страница 4: ...9 7 8 9 10 11 12 13 14 15 16 LED1 LED2 LED3 LED4 OSC DOUT DIN CLK STB K1 SG18 GR11 SG17 GR12 VEE SG16 KS16 SG15 KS15 SG14 KS14 SG13 KS13 SG12 KS12 SG11 KS11 SG10 KS10 22 21 20 19 18 17 23 24 25 26 27...

Страница 5: ...t clock starting from the lower bit 7 CLK Schmitt Trigger I Clock Input Pin This pin reads serial data at the rising edge and outputs data at the falling edge 8 STB Schmitt Trigger I Serial Interface...

Страница 6: ...DIN Pin when STB is LOW However for these commands the bits 5 to 6 b4 to b5 are ignored bits 7 8 b6 to b7 are given a value of 0 The Display Mode Setting Commands determine the number of segments and...

Страница 7: ...9 DIG10 DIG11 DIG12 xxHL xxHU b0 b3 b4 b7 Lower 4 bits Higher 4 bits 0 0 H L 0 0 H U 0 1 H L 0 1 H U 0 2 H L 0 2 H U 0 3 H L 0 3 H U 0 4 H L 0 4 H U 0 5 H L 0 5 H U 0 6 H L 0 6 H U 0 7 H L 0 7 H U 0 8...

Страница 8: ...ng Commands executes the Data Write or Data Read Modes for PT6315 The data Setting Command the bits 5 and 6 b4 b5 are ignored bit 7 b6 is given the value of 1 while bit 8 b7 is given the value of 0 Pl...

Страница 9: ...nd starting from the last significant bit When the most significant bit of the data SG1 b0 has been read the least significant bit of the next data SG16 b7 is read Figure 7 PT6315 Key Input Data Stora...

Страница 10: ...e are only 4 LED display terminals bits 5 to 8 b4 b7 are not used and therefore ignored This means that b4 to b7 does NOT in anyway activate any LED Display they are totally ignored When a bit b0 b3 i...

Страница 11: ...e used to set the address of the display memory The address is considered valid if it has a value of 00H to 23H If the address is set to 24H or higher the data is ignored until a valid address is set...

Страница 12: ...SPLAYCONTROL COMMANDS The Display Control Commands are used to turn ON or OFF a display It also used to set the pulse width Please refer to the diagram below When the power is turned ON a 1 16 pulse w...

Страница 13: ...display timing diagram is given below One cycle of key scanning consists of 2 frames The data of the 16 x 2 matrix is stored in the RAM Internal Operating Frequency fosc 224 T Figure 12 PT6315 Scanni...

Страница 14: ...output pin therefore it is highly recommended that an external pull up resistor 1 KOhms to 10 KOhms must be connected to DOUT Figure 13 PT6315 Serial Communication Format where twait waiting time 1us...

Страница 15: ...trobe Pulse Width 1us t setup Data Setup Time 100ns thold Data Hold Time 100ns tCLK STB Clock Strobe Time 1us tTHZ Fall Time 150us tTZH2 Grid Rise Time 0 5us at VDD 5V tPZL Propagation Delay Time 100n...

Страница 16: ...am Figure 15 Display Memory Updated by Address Increments The following diagram shows the waveforms when updating specific addresses Figure 16 Address Update 3 3 3 Data Setting Command Address Setting...

Страница 17: ...thus it is strongly suggested that the contents of the Display RAM must be cleared during the initial setting Figure 17 Recommended Software Flowchart S T A R T S E T C O M M A N D 2 W r i t e D a t a...

Страница 18: ...t o 7 Volts Driver Supply Voltage V EE V D D 0 5 t o V D D 4 0 Volts Logic Input Voltage V I 0 5 t o V D D 0 5 Volts VFD Driver Output Voltage Vo V E E 0 5 t o V D D 0 5 Volts L E D D r i v e r O u t...

Страница 19: ...l Output Current IO H S G Vo V D D 2 V SG1 KS1 to S G 1 6 K S 1 6 3 mA High Level Output Current IO H G R Vo V D D 2 V GR1 to GR8 SG17 GR12 to SG24 GR5 15 mA Oscillation Frequency fosc R 8 2 K o h m s...

Страница 20: ...Output Current IO H S G Vo V D D 2 V SG1 KS1 to S G 1 6 K S 1 6 1 5 mA High Level Output Current IO H G R Vo V D D 2 V GR1 to GR8 SG17 GR12 to SG24 GR5 6 mA Oscillation Frequency fosc R 100 Kohms see...

Страница 21: ...F connected between the GND and the VDD pins must be located as close as possible to the PT6315 chip 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44...

Страница 22: ...pacitor 0 1uF connected between the GND and the VDD pins must be located as close as possible to the PT6315 chip 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 MCU S19 S18 S17 S16 S15 S14 S13 S...

Страница 23: ...Tel 886 2 29162151 Fax 886 2 29174598 VFD Driver Controller IC PT6315 PT6315 v2 0 Page 23 Sep 2002 Note 1 L Lead Free 2 The Lead Free mark is put in front of the date code ORDER INFORMATION...

Страница 24: ...9174598 VFD Driver Controller IC PT6315 PT6315 v2 0 Page 24 Sep 2002 PACKAGE DIMENSION 44 Pin LQFP Package Body Size 10mm x 10mm Pitch 0 80mm THK Body 1 40mm C SEATING PLANE 3 S L 0 25mm GAUGE PLANE R...

Страница 25: ...n the zone indicated 7 Dimension b does not include dambar protrusion Alowable dambar protrusion shall not cause the lead to exceed the maximum b dimension by more than 0 08mm Dambar cannot be located...

Страница 26: ...15 v2 0 Page 26 Sep 2002 44 Pin SSOP Package Notes 1 Dimension D do not include mold flash protrusions or gate burrs 2 Mold flash protrusions or gate burrs shall not exceed 0 006 inch 0 152 mm per sid...

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