Point Grey Flea3 GigE Technical Reference
E Control and Status Registers
Offset
Name
Field
Bit
Description
LUT_Bank_Wr_
Inq
Write_Bank_0_Inq
[16]
Capability of writing data to Bank 0
Write_Bank_1_Inq
[17]
Capability of writing data to Bank 1
Write_Bank_2_Inq
[18]
Capability of writing data to Bank 2
Write_Bank_3_Inq
[19]
Capability of writing data to Bank 3
Write_Bank_4_Inq
[20]
Capability of writing data to Bank 4
Write_Bank_5_Inq
[21]
Capability of writing data to Bank 5
Write_Bank_6_Inq
[22]
Capability of writing data to Bank 6
Write_Bank_7_Inq
[23]
Capability of writing data to Bank 7
Write_Bank_8_Inq
[24]
Capability of writing data to Bank 8
Write_Bank_9_Inq
[25]
Capability of writing data to Bank 9
Write_Bank_10_Inq
[26]
Capability of writing data to Bank 10
Write_Bank_11_Inq
[27]
Capability of writing data to Bank 11
Write_Bank_12_Inq
[28]
Capability of writing data to Bank 12
Write_Bank_13_Inq
[29]
Capability of writing data to Bank 13
Write_Bank_14_Inq
[30]
Capability of writing data to Bank 14
Write_Bank_15_Inq
[31]
Capability of writing data to Bank 15
80008h
LUT_Ctrl
Presence_Inq
[0]
Presence of this Feature
0: Not Available, 1: Available
[1-4]
Reserved
ON_OFF
[5]
Read: read a status
Write: ON or OFF this feature
0: OFF 1: ON
When ON is written, the ON_OFF field of the
GAMMA register is turned to OFF.
[6-27]
Reserved
Active_Bank
[28-31]
Active bank
8000Ch
Bank_0_
Offset_Inq
Bank_0_Quadlet_Offset
[0-31]
32-bit offset of Bank 0 table data
80010h
Bank_1_
Offset_Inq
Bank_1_Quadlet_Offset
[0-31]
32-bit offset of Bank 1 table data
80014h
Bank_2_
Offset_Inq
Bank_2_Quadlet_Offset
[0-31]
32-bit offset of Bank 2 table data
80018h
Bank_3_
Offset_Inq
Bank_3_Quadlet_Offset
[0-31]
32-bit offset of Bank 3 table data
8001Ch
Bank_4_
Offset_Inq
Bank_4_Quadlet_Offset
[0-31]
32-bit offset of Bank 4 table data
80020h
Bank_5_
Offset_Inq
Bank_5_Quadlet_Offset
[0-31]
32-bit offset of Bank 5 table data
80024h
Bank_6_
Offset_Inq
Bank_6_Quadlet_Offset
[0-31]
32-bit offset of Bank 6 table data
Revised 10/29/2013
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