Pioneer DVJ-1000, Руководство по обслуживанию

Страница: 143 / 160

DVJ-1000
143
5 6 7 8
5 6
7
8
C
D
F
A
B
E
No. Mark Pin name I/O Function
MN103S71F (DVPL ASSY : IC7100) (2/3) [SODC]
Pin Function
75 FG FG I Spindle motor FG input
76 TX TX O NC
77 VDD15 VDD15 - Power supply (VD1R5)
78 VSS VSS - GNDD
79 TSTSG TSTSG O EQ calibration signal to FEP
80 VFOSHORT VFOSHORT O VFO short control
81 JLINE JLINE O NC
82 BDO BDO I BDO (black dot out) input
83 OFTR OFTR I OFTR (off track) input
84 AVSSD AVSSD - GNDA
85 ROUT ROUT O NC
86 LOUT LOUT O NC
87 AVDDD AVDDD - Power supply (VA3V)
88 VCOF VCOF I VCO control voltage
89 TRCRS TRCRS I Input for TRCRS (track cross) formation
90 AVDDC AVDDC - Power supply (VA3V)
91 WBLIN WBLIN I Connect to VSS
92 CSLFLT CSLFLT I NC
93 RFDIF RFDIF I NC
94 AVSSC AVSSC - GNDA
95 PLFLT2 PLFLT2 I Capacitor connection for PLL
96 PLFLT1 PLFLT1 I Capacitor connection for PLL
97 AVSSB AVSSB - GNDA
98 ARF ARF I RF+input
99 NARF NARF I RF-input
100 VHALF VHALF I Reference voltage (1.65V) input
101 RVI RVI I VREFH reference current source control
102 VREFH VREFH I Reference voltage (2.2V) input
103 DSLF2 DSLF2 I Capacitor connection for DSL (data slicer)
104 DSLF1 DSLF1 I Capacitor connection for DSL (data slicer)
105 AVDDB AVDDB - Power supply (VA3V)
106 JITOUT JITOUT O Jitter monitor output
107 AVDDA AVDDA - Power supply (VA3V)
108 TECAPA TECAPA I NC
109 AD0 AD0(FE) I Focus error input
110 AD2 AD2(AS) I RFAS input
111 AD1 AD(TE) I Tracking error input
112 AD3 AD3(RFENV) I RF envelope input
113 AD4 AD4(RFDIF) I Radial differential input
114 AD5 AD5(FEDRV) I Focus drive input
115 AD6 AD6(TEDRV) I Tracking drive input
116 AD7 AD7(T+) I Connect to VSS
117 AD8 AD8(T-) I Connect to VSS
118 AVSSA AVSSA - GNDA
119 PWM0 PWM0 O Focus drive control
120 PWM1 PWM1 O Tracking drive control
121 VSS VSS - GNDD
122 VDD3 VDD3 - Power supply (VD3V)
123 IDGT IDGT O NC
124 DTR DTR O NC
125 MONI0/P9 SPGAIN/MONI0 I/O SPDL motor current switching control (at reverse brake: H)
126 MONI1/P10 DL_CHK/MONI1 I/O Program start check (at program start: H)
127 MONI2/P11 SETUP_CHK/MONI2 I/O SETUP check (at disc start process complete: H)
128 MONI3/P12 NDMUTE2/MONI3 I/O L output
129 MSTPOL/MONI4 MSTPOL/MONI4 I
130 DASPST/MONI5 DASPST/MONI5 I Connect to VSS
131 NEJECT/MONI6 NEJECT/MONI6 O NC
132 NTRYCL/MONI7 NTRYCL/MONI7 O NC
133 DMARQ DMARQ O DMA request output to host
134 NIOWR NIOWR I Host write input
135 VDD3 VDD3 - Power supply (VD3V)
136 VSS VSS - GNDD
137 NIORD NIORD I Host read input
138 IODRY IODRY O Ready output to host
139 NDMACK NDMACK I Host DMA acknowledge input
140 INTRQ INTRQ O Interrupt output to host
141 NIOCS16 NIOCS16 O Data bus width selection
142 DA1 DA1 I Address input
143 NPDIAG NPDIAG I/O
144 DA0 DA0 I Address input
145 VSS VSS - GNDD
146 VDD3 VDD3 - Power supply (VD3V)
147 DA2 DA2 I Address input
148 NCS1FX NCS1FX I Chip select input