DVJ-1000
155
5
6
7
8
5
6
7
8
C
D
F
A
B
E
HD6417709SHF200B (MAIN ASSY : IC111) (3/3) [CPU]
Pin Function
Pin name
Signal name
I/O
Function
147 Vss-PLL1
GNDD
-
Power supply for PLL1 (0V)
148 Vss-PLL2
GNDD
-
Power supply for PLL2 (0V)
149 CAP2
CAP2
-
C
150 Vcc-PLL2
V+2SH
-
Power supply for PLL2 (2.0V)
151 AUDCK
AUDCK
I
Use with JTAG terminal
152 Vss
GNDD
-
Power supply (0V)
153 Vss
GNDD
-
Power supply (0V)
154 Vcc
V+2SH
-
Power supply (2.0V)
155 XTAL
XTAL
O
-
156 EXTAL
EXTAL
I
GNDD
157 PTJ[6]
XPCM_ACK
O
TI DSP Output data acknowledge
158 PTJ[7]
XBS_ACK
O
TI DSP Input data acknowledge
159 PTH[7]
FPGA_XPRG
IO
PRG for FPGA configuration
160 XIRQOUT
-
O
-
161 VssQ
GNDD
-
Power supply for input/output (0V)
162 CKIO
CKIO
I
Clock input (66MHz)
163 VccQ
V+3SH
-
Power supply for input/output (3.3V)
164 TxD0
MD
O
FPGA configuration serial data output
165 SCK0
MC
IO
FPGA configuration serial clock output
166 TxD1
OSD_MD
-
-
167 SCK1
OSD_MC
-
-
168 TxD2
TXD2
O
RS-232-C communication output
169 SCPT[5]
OSD_RESET
-
-
170 SCPT[6]
OSD_XCS
-
-
171 SCPT[0]
DJMODE_SW
I
Normal mode/DJ mode switching SW
172 RxD1
-
-
-
173 Vss
GNDD
-
Power supply (0V)
174 RxD2/SCPT[4]
RxD2
I
RS-232-C communication input
175 Vcc
V+2SH
-
Power supply (2.0V)
176 IRQ5
AV1_XINT2
I
AV-1 INT2 interrupt
177 PTC[7]
VQE_RST
O
ADV7172 reset
178 PTC[6]
DMA_RST
O
Reset for DMA FPGA
179 PTC[5]
CAP_RST
O
Reset for capture FPGA
180 PTC[4]
VMC_RST
O
Reset for VMC FPGA
181 VssQ
GNDD
-
Power supply for input/output (0V)
182 PTD[3]
TE4300_RST
O
TE4300 reset
183 VccQ
V+3SH
-
Power supply for input/output (3.3V)
184 PTD[2]
-
-
-
185 PINT[3]
CAP_XINT
O/IO/I Capture FPGA interrupt
186 PINT[2]
TE4300_XINT
O/IO/I TE4300 interrupt
187 PINT[1]
DMA_XINT
O/IO/I DMA FPGA interrupt
188 PINT[0]
-
O/IO/I -
189 PTD[1]
GSL_RST
O
GSL reset
190 PTD[0]
-
-
-
191 XDREQ0
DREQ0
I
DMA request 0
192 XDREQ1
DREQ1
I
DMA request 1
193 XRESETP
XRESET
I
Reset input
194 CA
CA
I
pull up
195 MD3
MD3
I
pull down
196 MD4
MD4
I
pull up
197 MD5
MD5
I
pull down
198 AVss
GNDD
-
Power supply for analog (0V)
199 PTL[0]
MOT_EMPTY
I
Motorola FIFO empty signal input (High at EMPTY)
200 AN[1]
-
I
-
201 AN[2]
-
I
-
202 AN[3]
-
I
-
203 AN[4]
-
I
-
204 AN[5]
-
I
-
205 AVcc(3.3V)
V+3SH
-
Power supply for analog (3.3V)
206 AN[6]
-
I
-
207 AN[7]
-
I
-
208 AVss
GNDD
-
Power supply for analog (0V)
No.
Содержание DVJ-1000
Страница 29: ...DVJ 1000 29 5 6 7 8 5 6 7 8 C D F A B E A 1 8 8 2 ...
Страница 34: ...DVJ 1000 34 1 2 3 4 1 2 3 4 C D F A B E 3 7 MAIN ASSY 4 8 A 4 8 6 8 A 2 8 A 1 8 A ATAPI I F ...
Страница 35: ...DVJ 1000 35 5 6 7 8 5 6 7 8 C D F A B E A 4 8 MAIN ASSY DWG1630 A 4 8 0 0 CN7007 B 1 8 A 8 8 A 11 ...
Страница 37: ...DVJ 1000 37 5 6 7 8 5 6 7 8 C D F A B E A 5 8 8 8 A 13 12 ...
Страница 41: ...DVJ 1000 41 5 6 7 8 5 6 7 8 C D F A B E 8 8 A A 7 8 ...
Страница 44: ...DVJ 1000 44 1 2 3 4 1 2 3 4 C D F A B E 1 2 2 2 2 2 A 8 8 A 8 8 MAIN ASSY DWG1630 Large size SCH diagram 28 29 ...
Страница 45: ...DVJ 1000 45 5 6 7 8 5 6 7 8 C D F A B E A 8 8 26 27 ...
Страница 49: ...DVJ 1000 49 5 6 7 8 5 6 7 8 C D F A B E SDCB ASSY DWX2630 F 3 8 CN501 A F ...
Страница 53: ...DVJ 1000 53 5 6 7 8 5 6 7 8 C D F A B E AJCB ASSY DWG1639 R Q R 54 A Analog Audio Signal Rout A A A A A A ...
Страница 55: ...DVJ 1000 55 5 6 7 8 5 6 7 8 C D F A B E JOGB ASSY DWG1637 J ...
Страница 58: ...DVJ 1000 58 1 2 3 4 1 2 3 4 C D F A B E 3 18 DFLB ASSY DFLB ASSY DWG1632 N N CN3001 I ...
Страница 59: ...DVJ 1000 59 5 6 7 8 5 6 7 8 C D F A B E N ...
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Страница 101: ...DVJ 1000 101 5 6 7 8 5 6 7 8 C D F A B E SIDE B SIDE B T POWER SUPPLY ASSY T DWR1436 T CN101 CN102 ...
Страница 124: ...DVJ 1000 124 1 2 3 4 1 2 3 4 C D F A B E 7 1 5 DVJ 1000 BLOCK CHART DJ MODE ...
Страница 125: ...DVJ 1000 125 5 6 7 8 5 6 7 8 C D F A B E ...
Страница 126: ...DVJ 1000 126 1 2 3 4 1 2 3 4 C D F A B E 7 1 6 DVJ 1000 BLOCK CHART NORMAL MODE ...
Страница 127: ...DVJ 1000 127 5 6 7 8 5 6 7 8 C D F A B E ...