Phytec phyCARD-M, Руководство по оборудованию

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phyCARD-M [PCA-A-M1-xxx]
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PHYTEC Messtechnik GmbH 2010 L-750e_1
7 System Memory
The phyCARD-M provides three types of on-board memory:
•
DDR2-SDRAM: 64MByte (up to 256MByte)
•
NAND Flash: 128MByte (up to 1GByte)
•
I²C-EEPROM: 4KB (up to 32KByte)
The following sections of this chapter detail each memory type used
on the phyCARD-M.
7.1 DDR2-SDRAM (U8 - U11)
The RAM memory of the phyCARD-M in comprised of up to four 16-
bit wide DDR2-SDRAM chips at U8 - U11. They are connected to the
special SDRAM interface of the i.MX35 processor, configured for 32-
bit access, and operating at the maximum frequency of 133MHz.
The phyCARD-M can use one, or both of the DDR2-SDRAM banks
on the i.MX35 depending on the SDRAM population density options.
Each RAM bank is comprised of two 16-bit wide DDR2-SDRAM
chips, configured for 32-bit access, and operating at 133MHz. In
lower density configurations, U9 and U11 populate the module and
are accessed via SDRAM memory bank 0 using chip select signal
/CSD0 starting at 0x8000 0000. In higher density configurations, U8
and U10 are also populated and are accessed via SDRAM memory
bank 1 using chip select signal /CSD1 starting at 0x9000 0000.
Typically the DDR2-SDRAM initialization is performed by a boot
loader or operating system following a power-on reset and must not be
changed at a later point by any application code. When writing custom
code independent of an operating system or boot loader, SDRAM
must be initialized by accessing the appropriate SDRAM
configuration registers on the i.MX35 controller. Refer to the i.MX35
Reference Manual for accessing and configuring these registers.