Phytec phyBOARD Regor AM335x, Инструкция по применению

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phyBOARD-Regor AM335x [PB-01802-xxx]
26

PHYTEC Messtechnik GmbH 2018 L-823e_2
Pin # Signal Name Type SL Description
15 X_JTAG_TMS IN 3.3 V JTAG Chain Test Mode Select signal
16 X_nJTAG_TRST IN 3.3 V JTAG Chain Test Reset (active low)
17 X_JTAG_TDI IN 3.3 V JTAG Chain Test Data Input
18 X_JTAG_TDO OUT 3.3 V JTAG Chain Test Data Output
19 GND - - Ground
20 X_JTAG_TCK IN 3.3 V JTAG Chain Test Clock signal
21 USB_DP1 I/O 3.3 V USB data plus USB1
22 USB_DM1 I/O 3.3 V USB data minus USB1
23 nRESET_OUT OUT 3.3 V Reset (active low)
24 GND - - Ground
25 X_MMC2_CMD I/O 3.3 V MMC command
3
26 X_MMC2_DAT0 I/O 3.3 V MMC data 0
3
27 X_MMC2_CLK I/O 3.3 V MMC clock
3
28 X_MMC2_DAT1 I/O 3.3 V MMC data 1
3
29 GND - - Ground
30 X_MMC2_DAT2 I/O 3.3 V MMC data 2
3
31 X_UART2_RX_GPIO3_9 I/O 3.3 V UART 2 receive data; GPIO3_9
4
32 X_MMC2_DAT3 I/O 3.3 V MMC data 3
3
33 X_UART2_TX_GPIO3_10 I/O 3.3 V UART 2 transmit data; GPIO3_10
4
34 GND - - Ground
35 X_UART3_RX_GPIO2_18 I/O 3.3 V UART 3 receive data; GPIO2_18
4
36 X_UART3_TX_GPIO2_19 I/O 3.3 V UART 3 transmit data; GPIO2_19
4
37 X_INTR1_GPIO0_20 I/O 3.3 V Interrupt 1; GPIO0_20
38 X_GPIO0_7 I/O 3.3 V GPIO0_7
39 X_AM335_EXT_WAKEUP IN 3.3 V External wakeup
40 X_INT_RTCn OUT 3.3 V Interrupt from the RTC (active low)
41 GND - - Ground
42 X_GPIO3_7 I/O 3.3 V GPIO3_7
43 nRESET_IN IN 3.3 V Push-button S2 reset (active low)
44 X_GPIO1_31 I/O 3.3 V GPIO1_31
45 X_AM335_NMIn IN 3.3 V AM335x non-maskable interrupt
Table 15: Pin Assignment of PHYTEC Expansion Connector X6 (continued)
3: These pins are configured as GPIO pins. To use them as MMC/SD card interface, the pin muxing must be changed and
additional software development is required.
4: These pins are configured as GPIO pins. To use them as UART interface, the pin muxing must be changed and additional
software development is required.