![Phytec L-1017e.A3 i.MX 8M Plus Скачать руководство пользователя страница 44](http://html1.mh-extra.com/html/phytec/l-1017e-a3-i-mx-8m-plus/l-1017e-a3-i-mx-8m-plus_manual_1554092044.webp)
L-1017e.A3 i.MX 8M Plus BSP Manual
•
•
•
eMMC Devices
PHYTEC modules like phyCORE-i.MX 8M Plus are populated with an eMMC memory chip as the main storage. eMMC
devices contain raw MLC memory cells combined with a memory controller that handles ECC and wear leveling.
They are connected via an SD/MMC interface to the i.MX 8M Plus and are represented as block devices in
the
Linux
kernel like SD cards, flash drives, or hard disks.
The electric and protocol specifications are provided by JEDEC (
https://www.jedec.org/standards-documents/
technology-focus-areas/flash-memory-ssds-ufs-emmc/e-mmc
). The eMMC manufacturer's datasheet is relatively
short and meant to be read together with the supported version of the JEDEC eMMC standard.
PHYTEC currently utilizes the eMMC chips:
Extended CSD Register
eMMC devices have an extensive amount of extra information and settings that are available via the
Extended
CSD
registers. For a detailed list of the registers, see manufacturer datasheets and the JEDEC standard.
In the
Linux
user space, you can query the registers:
target$ mmc extcsd read /dev/mmcblk2
You will see:
=============================================
Extended CSD rev
1.7
(MMC
5.0
)
=============================================
Card Supported Command sets [S_CMD_SET:
0x01
]
[...]
Enabling Background Operations (BKOPS)
In contrast to raw NAND Flash, an eMMC device contains a Flash Transfer Layer (FTL) that handles the wear leveling,
block management, and ECC of the raw MLC cells. This requires some maintenance tasks (for example erasing
unused blocks) that are performed regularly. These tasks are called
Background Operations
(
BKOPS
).
By default (depending on the chip), the background operations may or may not be executed periodically, impacting
the worst-case read and write latency.
The JEDEC Standard has specified a method since version v4.41 that the host can issue BKOPS manually. See the
JEDEC Standard chapter
Background Operations
and the description of registers
BKOPS_EN
(Reg: 163)
and
BKOPS_START
(Reg: 164) in the eMMC datasheet for more details.
Meaning of Register
BKOPS_EN
(Reg: 163) Bit
MANUAL_EN
(Bit 0):
Value 0: The host does not support the manual trigger of BKOPS. Device write performance suffers.
Value 1: The host does support the manual trigger of BKOPS. It will issue BKOPS from time to time when it
does not need the device.
Содержание L-1017e.A3 i.MX 8M Plus
Страница 1: ...A Product of PHYTEC Technology Holding Company L 1017e A3 i MX 8M Plus BSP Manual...
Страница 30: ...L 1017e A3 i MX 8M Plus BSP Manual Drag the slider as far as you like or enter the size manually...
Страница 33: ...L 1017e A3 i MX 8M Plus BSP Manual Confirm your changes by pressing the green tick...