Phytec 1488.2, Руководство по оборудованию

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PCM-065/phyCORE-i.MX8X System on Module L-864e.A1
© PHYTEC America LLC, 2021 36
3 Power
The following subsections discuss the power configuration of the phyCORE-i.MX8X in detail.
3.1 Primary System Power (VCC)
The phyCORE-i.MX8X SOM operates from a primary voltage supply ( VCC ) with a nominal value of +3.3V . On-
board switching regulators generate the additional voltage supplies required by the i.MX8X and on-board
components from
VCC supplied to the SOM.
For proper operation, the phyCORE-i.MX8X SOM must be supplied with a voltage source of 3.3V (±5 %) with a
minimum 2A capacity at the VCC pins on the phyCORE-Connector X1. These pins are C67, C68, C69, C70,
D67, D68, D69, and D70 on the X1 connector.
Connect all + 3.3V VCC input pins to your power supply and, at the very least, a matching number of ground
pins.
CAUTION:
As a general design rule, PHYTEC recommends connecting all ground pins which are next to signals that are
being used in the application circuitry. For maximum EMI performance, all ground pins should be connected
to a solid ground plane.
3.2 Backup Power (VBAT)
To backup the Secure Non-Volatile Storage (which includes the RTC), a secondary voltage source of 3V can be
supplied to the phyCORE-i.MX8X SOM at the VBAT pin (pin C66 of phyCORE-Connector X1). The PMIC goes
into a Coin-Cell State using VBAT to keep the VSNVS line powered when VCC is powered off. In order for the
SNVS in the processor to maintain time when main system power is removed, the VBAT input must be supplied
with power. The SNVS draws 10 uA at 3V and is the only draw on VBAT. For more information regarding the
recommended operating voltage of the Backup Power Source VBAT, refer to
Table 4 (Operating Conditions for
Input/Output Power Domains) .
3.3 Reset
Several reset inputs and outputs are accessible at the phyCORE-Connector as listed in Table 11 below. The
X_nRESET_IN signal can be driven low to trigger a cold reset of the SOM. The X_POR_B_3V3, X_POR_B_1V8,
and X_PGOOD signals are status outputs. PGOOD indicates when the power is good and
POR_3V3/POR_1V8 can be used to reset external devices.
Table 11. Reset Pin Description
X1 Pin # Signal Type Level Description
C46 X_nRESET_IN I 3.3V Cold Reset
C52 X_POR_B_3V3 O 3.3V 3.3V Domain POR Status Output
C51 X_POR_B_1V8 O 1.8V 1.8V Domain POR Status Output
C53 X_PGOOD O 3.3V PMIC Power Good Status Output