10.
Circuit Diagrams and PWB Layouts
10-4-7
B07, Audio, Headphone
19421_506_1
3
0416.ep
s
1
3
041
8
A
u
dio, He
a
dphone
B07
B07
2012-12-17
2
17MB95-2.1
A
u
dio, He
a
dphone
560R
R267
TP124
1
3
V
3
_VCC
C5
8
5
0p5
50V
AZ099-04
S
U1
1
2
3
4
5
6
IO4
VDD
IO
3
IO2
GND
IO1
C1177
10
u
25V
R
8
05
1
8
0k
EXT_RE
S
ET
S
9
3
1
2
5V_VCC
U
S
B_ENABLE2
U
S
B2_VCC
560R
R75
10k
R276
16V
100n
C160
U2
TP
S
255
3
-1
4
5
6
3
2
1
IN
GND
EN
OUT
ILIM
FAULT
R19
3
560R
R259
560R
5V_VCC
U
S
B_ENABLE1
U
S
B1_VCC
C161
100n
16V
TP
S
255
3
-1
U22
4
5
6
3
2
1
IN
GND
EN
OUT
ILIM
FAULT
TP91
1
TP92
1
TP100
1
TP101
1
S
9
1
2
CN17
1
2
3
4
CN1
8
1
2
3
4
TP96
1
TP97
1
F69
33
0R
1
2
10V
10
u
C12
U
S
B1_VCC
10V
10
u
C114
U
S
B2_DN
U
S
B1_DN
U
S
B1_VCC
10R
R74
1
2
U
S
B2_DP
S
11
1
2
R
3
09
10R
1
2
Q45
BC
8
4
8
B
S
2_RE
S
ET
10k
R2
3
V
3
_VCC
R11
3
10k
TP9
8
1
TP99
1
F5
60R
1
2
10V
10
u
C115
10V
10
u
C14
3
60R
F6
1
2
F70
33
0R
1
2
U
S
B2_VCC
10R
R
3
11
1
2
U
S
B1_DP
10R
R
3
10
1
2
S
20
1
2
3
V
3
_VCC
6V
3
22
u
C
3
96
F17
60R
S
2_TUN_
3
V
3
LNB_POK
S
2
3
C5
8
4
3
p
3
50V
C1204
100
u
3
5V
C1194
10
u
25V
25V
10
u
C1195
25V
10
u
C1176
S
H2
2
1
L10
10
u
22
u
6V
3
C
3
95
6V
3
22
u
C
3
97
C
3
9
8
22
u
6V
3
CN25
I2C_ADR0
I2C_ADR0
I2C_ADR1
I2C_ADR1
10
u
16V
C545
3
V
3
_VCC
VDDO_
3
V
3
60R
F25
1V26_VCC
F26
60R
VDDI_1V25
F27
60R
VDDO_
3
V
3
VDDA_
3
V
3
10p
50V
C
3
69
VDDI_1V25
10V
C
3
2
100n
10V
C
33
100n
VDDI_1V25
C
3
4
100n
10V
VDDO_
3
V
3
33
R
R496
33
R
R497
R575
33
R
1
2
3
4
5
6
7
8
R1
R2
R
3
R4
M
88
D
S3
002
U29
16
15
14
1
3
12
11
10
9
8
7
6
5
4
3
2
1
3
2
3
1
3
0
29
2
8
27
26
25
24
2
3
22
21
20
19
1
8
17
33
3
4
3
5
3
6
3
7
38
3
9
40
41
42
4
3
44
45
46
47
4
8
49
50
51
52
5
3
54
55
56
57
5
8
59
60
61
62
6
3
64
NC5
GPO
VCC_10
NC4
NC
3
VDDD_4
NC2
NC1
NC9
NC
8
LOCK
VCC_9
LNB_EN
CKXTAL_1
3
OLF
GNDD
M_CKOUT
M_
S
YNC
VCC_
8
M_VAL
M_ERR
M_DATA7
M_DATA6
VDDD_
3
M_DATA5
M_DATA4
VCC_7
M_DATA
3
M_DATA2
M_DATA1
M_DATA0
VCC_6
AAGC
S
CLT
S
DAT
VCC_
3
S
DA
S
CL
VDDD_2
ADDR_
S
EL1
ADDR_
S
EL0
VCC_4
V
S
EL
DI
S
EQC_IN
DI
S
EQC
VCC_5
CKXTAL_27
RE
S
ET
GNDA_1
XTAL_IN
XTAL_OUT
VDDA_1
GNDA_2
IP
IN
VDDA_2
GNDA_
3
QN
QP
NC6
VDDD_1
VCC_1
VCC_2
NC7
33
R
R49
8
R576
33
R
1
2
3
4
5
6
7
8
R1
R2
R
3
R4
C
3
5
10V
100n
VDDI_1V25
T
S
1_CLK
T
S
1_
S
YNC
T
S
1_VLD
T
S
1_D7
T
S
1_D6
T
S
1_D5
T
S
1_D4
T
S
1_D0
T
S
1_D1
T
S
1_D2
T
S
1_D
3
VDDI_1V25
VDDI_1V25
C
3
6
100n
10V
C
3
7
10V100n
VDDO_
3
V
3
10V100n
C
38
10V
100n
C
3
9
VDDI_1V25
VDDI_1V25
VDDI_1V25
C40
100n
10V
100n
C41
10V
100n
10V
C42
10k
R17
8
12
R179
10k
12
VDDO_
3
V
3
10V
100n
C4
3
R499
33
R
33
R
R500
50V
1
8
p
C22
8
C229
50V
1
8
p
4k7
R102
1
2
C
33
0
16V
10n
VDDO_
3
V
3
R10
3
4k7
12
R69
8
2k
S
2_AGC
VDDO_
3
V
3
R104
4k7
1
2
R105
4k7
1
2
S
2_
S
CL
S
2_
S
DA
VDDI_1V25
C44
100n
10V
VDDO_
3
V
3
VDDA_
3
V
3
100n
C45
10V
10V
C46
100n
C47
100n
10V
C4
8
100n
C49
100n
10p
50V
C
3
70
10p
50V
C
3
71
10p
50V
C
3
72
100n
C50
100n
C51
10p
50V
C
3
7
3
S
2_IP
S
2_IN
S
2_QN
S
2_QP
27p
50V
C414
C415
50V
27p
CLKO_T
S
2022
S
Y
S
_
S
DA
S
Y
S
_
S
CL
DI
S
EQC_OUT
S
12
1
2
S
1
3
1
2
VDDO_
3
V
3
S
2_RE
S
ET
LNB_EN
1
3
/1
8
V
3
V
3
_VCC
U20
MP
8
125
9
10
11
12
1
3
14
15
16
8
7
6
5
4
3
2
1
S
GND
BYPA
SS
VDD
COMP
EN
LINEDROP
POK
1
3
V/1
8
V
PGND
S
W
B
S
T
VBOO
S
T
VOUT
ILIMIT
TCAP
EXTM
C1225
10
u
25V
C576
50V
15n
100k
R
3
90
25V
4
u
7
C5
8
2
L19
10
u
R6
83
10k
220n
C5
83
25V
15n
50V
C577
50V
100n
C572
C57
8
15n
50V
C2
3
6
100n
16V
3
V
3
_VCC
R
3
92
100k
22k
R702
C2
3
7
100n
16V
100n
50V
C57
3
C22V
D16
12V_VCC
LNB_EN
1
3
/1
8
V
DI
S
EQC_OUT
C2
38
100n
16V
LNB_OUT
LINEDROP
D9
1N5
8
19
D10
1N5
8
19
R5
3
7
10k
1N5
8
19
D11
D12
1N5
8
19
R5
3
6
10k
10n
16V
C
33
1
R704
3
k
3
S
2_TUN_
3
V
3
S
2_TUN_
3
V
3
50V
27p
C416
27p
C417
50V
10n
16V
C
33
2
10n
16V
C
333
10n
16V
C
33
4
C
33
5
10n
16V
X7
27MHz
3
1
4
2
S
2_TUN_
3
V
3
10k
R1
8
0
470R
R705
10n
C
33
6
16V
10p
C
3
74
50V
50V
1n
C
3
16
C
3
75
50V
10p
S
14
1
2
C
3
76
50V
10p
C
3
77
10p
50V
50V
1n
C
3
17
S
2_TUN_
3
V
3
C
33
7
16V
10n
2k
R699
R700
2k
1k
R
3
2
8
S
2_AGC
10k
R1
8
1
CLKO_T
S
2022
10n
C
338
16V
C
3
1
8
50V
1n
4n7
L20
50V
1n
C
3
19
S
16
1
2
S
2_TUN_
3
V
3
S
2_TUN_
3
V
3
C2
3
0
1
8
p
50V
C2
3
1
1
8
p
50V
R501
33
R
R502
33
R
S
2_IP
S
2_IN
S
2_QN
S
2_QP
S
2_
S
DA
S
2_
S
CL
10n
16V
C
33
9
16V
C
3
40
10n
S
17
1
2
S
1
8
12
S
19
1
2
S
2_TUN_
3
V
3
10n
16V
C
3
41
50V
100p
C4
3
9
1n
C
3
20
50V
1n
C
3
21
50V
LNB_OUT
TP1
M
88
T
S
2022
U
3
0
7
6
5
4
3
2
1
14
1
3
12
11
10
9
8
15
16
17
1
8
19
20
21
22
2
3
24
25
26
27
2
8
VDDA6
AGC
VDD_REG
S
CL
S
DA
VDD_DIG
VDAA5
TE
S
T
LNA_IN
RE
S
ET
RFBYPA
SS
CKDIV_OPT
CAP
RE
S
XTALP
XTALN
VDDA
3
TE
S
T
3
TE
S
T2
TE
S
T1
VDDA4
QP
QN
VDDA1
IN
IP
CK_OUT
VDDA2
25V
10
u
C1205
25V
10
u
C579
C1179
10
u
16V
Re
a
d : D1H
U
S
B
S
2 DEMOD
S
2 TUNER
LNB POWER
Write : D0H
I2C Addre
ss**
ADDR_
S
EL pin
s
Re
a
d : C1H
Write : C0H
I2C Addre
ss**
pin VDD_DIG=High
3
00725
3
4
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
nc
22n
3
0000
3
12
b
om
nc
47n
3
0000
33
4
b
om
1U
b
om
NC
NC
NC
NC
NC
NC
NC
NC
clo
s
e to T
S
2022
clo
s
e to D
S3
002