IC Data Sheets
8.
8.6
Diagram
, TAS5719 (IC U35)
Figure 8-6 Internal block diagram and pin configuration
19420_
3
01_1
3
0
3
15.ep
s
1
3
0
3
15
Block diagram
Pinning information
CPN
CPP
PLL_FLTP
VR_ANA
HPVDD
AVSS
PLL_FLTM
HPR_IN
HPVSS
HPL_OUT
HPL_IN
RESET
HPR_OUT
STEST
N
D
P
GI
D
_
R
V
S
E
R
_
C
S
O
O
S
S
V
D
DVDD
K
L
C
M
L
E
S
_
A
K
L
C
S
NI
D
S
K
L
C
R
L
D
D
V
A
A
D
S
L
C
S
DVSS
GND
VREG
B
A
_
D
N
G
P
A
_
T
U
O
C
_
T
S
B
C
_
T
U
O
GVDD_OUT
HP_SD
R
M
W
P
_
P
H
B
A
_
D
D
V
P
D
_
T
U
O
BST_D
AGND
L
M
W
P
_
P
H
A
_
T
S
B
D
C
_
D
N
G
P
PVDD_CD
B
_
T
U
O
B
_
T
S
B
SSTIMER
PHP Package
TAS5717
(TAS5719)
1
2
3
4
5
6
7
8
9
10
11
12
13 14 15 16 17 18 19 20 21 22 23 24
25
26
27
28
29
30
31
32
48 47 46 45 44 43 42 41 40 39 38 37
36
35
34
33
SDIN
MCLK
SCLK
LRCLK
Serial
Audio
Port
Protection
Logic
Control
(DAP)
SDA
SCL
4
Order
th
Noise
Shaper
and
PWM
S
R
C
Autodetect
Serial
Control
Microcontroller
Based
System
Control
OUT_A
OUT_B
2 HB
FET Out
OUT_C
OUT_D
2 HB
FET Out
HPL_IN
HPL_OUT
HPR_IN
HPR_OUT