7
8
7.
Circuit Diagrams and PWB Layouts
SSB: PNX5100: Power
V
SS
VDD_
3
V
3
_PER
V
SS
VDD_
3
V
3
_LVD
S
OUT
VDD_1V
8
_DDR
V
SS
VDD_
3
V
3
_LVD
S
IN
VDD_1V2_CORE
V
SS
V
SS
9
A
B
C
D
E
F
A
B
C
2C62-
3
B2
D
1
2
3
4
5
2C61-1 B2
2C61-2 B2
2C61-
3
B2
2C61-4 B2
2C62-1 B2
2C62-2 D6
2C62-4 E6
2C6
3
-1 B
3
2C6
3
-2 B
3
6
7
8
9
1
2
3
4
5
6
7
8
2C6
8
-1 D1
2C6
8
-2 D2
2C6
8
-
3
D2
2C6
8
-4 D2
2C69-1 D2
2C69-2 D2
2C69-
3
D2
2C69-4 D2
2C70-1 D
3
2C70-2 D
3
2C70-
3
D
3
E
F
2C55 D1
2C56 D1
2C57 D9
2C5
8
F9
2C59 A1
2C60-1 B1
2C60-2 B1
2C60-
3
B1
2C60-4 B1
2C79 D6
2C
8
0 D6
2C
8
1 B
3
2C
8
2 F6
2C
83
F6
2C
8
4 D
8
2C
8
5 D9
2C6
3
-
3
E6
2C6
3
-4 B
3
2C64 B
3
2C65 B
3
2C66-1 C1
2C66-2 C2
2C66-
3
C2
2C66-4 C2
2C67-1 C2
2C67-2 C2
2C67-
3
C2
2C67-4 C2
5C60 D6
5C61 D6
5C62 E6
5C6
3
E6
5C64 F6
5C65 F6
PNX5100: POWER
5C66 D
8
5C67 E
8
5C6
8
E
8
5C69 E
8
2C70-4 D
3
2C71 E2
2C72 E2
2C7
3
E2
2C74 E2
2C75 E2
2C76 E
3
2C77 C9
2C7
8
-1 B1
2C7
8
-2 B1
2C7
8
-
3
B1
2C7
8
-4 D
3
IC
88
E9
IC
8
9 E9
IC90 F9
2C
8
6 D9
2C
8
7 D9
2C
88
E9
2C
8
9 E9
2C90 F9
2C91 F
8
2C92 F9
2C9
3
D7
2C94 F7
2C95 A1
2C96 A2
2C97 A2
5C70 F
8
7C00-10 A4
7C00-11 A7
CC60 A
3
IC
8
0 D7
IC
8
1 D7
IC
8
2 E7
IC
83
E7
IC
8
4 F7
IC
8
5 F7
IC
8
6 D9
IC
8
7 E9
1
8
45
100n
2C67-1
100n
2C66-4
100n
2C94
+1V2-PNX5100-CLOCK
3
0R
5C6
8
+1V2-PNX5100-DDR-PLL1
2C
8
6
100n
3
0R
5C70
45
+1V2-PNX5100
2C70-4
100n
IC
88
IC
8
9
1
8
+1V2-PNX5100-TRI-PLL
3
+1V2-PNX5100
100n
2C70-1
2C65
100n
100n
+
3
V
3
-PNX5100-DDR-PLL0
2C90
5C69
3
0R
100n
2C64
+1V2-PNX5100-DLL
100n
2C77
+
3
V
3
-PNX5100-LVD
S
-IN
+1V2-PNX5100
5C6
3
3
0R
100n
2C
83
+1V2-PNX5100
IC90
2C67-2
100n
27
S
EN
S
E+1V2-PNX5100
+1V2-PNX5100
100n
27
+1V2-PNX5100-TRI-PLL
3
+1V2-PNX5100-DLL
27
2C6
8
-2
100n
2C66-2
5C61
3
0R
3
+1V2-PNX5100
3
6
100n
2C6
3
-
3
100n
2C67-
3
1
8
5C66
3
0R
2C66-1
100n
10
u
2C55
2C56
10
u
2C57
10
u
2C5
8
100n
2C
8
4
100n
1
8
7
100n
2C6
8
-1
2C6
3
-2
100n
2
100n
2C6
3
-1
1
8
4
2C62-
3
100n
3
6
100n
2C62-4
45
2C67-4
100n
+1V2-PNX5100
+1V2-PNX5100
3
6
100n
2C
8
0
2C66-
3
100n
2C
8
9
+1V2-PNX5100-TRI-PLL2
100n
45
+1V2-PNX5100
100n
2C61-4
100n
2C
8
7
1
8
2C7
8
-1
100n
3
0R
5C60
100n
2C71
100n
2C74
2C79
100n
2C6
3
-4
100n
45
+
3
V
3
-PNX5100-LVD
S
-PLL
27
+1V2-PNX5100-LVD
S
-PLL
100n
2C7
8
-2
2C92
100n
+
3
V
3
+
3
V
3
+
3
V
3
2C7
3
100n
3
6
2C61-
3
100n
CC60
2C
8
2
100n
5
+1V2-PNX5100
2C7
8
-4
100n
4
2C60-2
100n
27
1
8
+1V2-PNX5100-CLOCK
+1V2-PNX5100
100n
2C60-1
+1V2-PNX5100-DDR-PLL1
+1V2-PNX5100-TRI-PLL1
+1V2-PNX5100-CLOCK
5C64
3
0R
2C7
8
-
3
100n
3
6
+
3
V
3
-PNX5100-CLOCK
2C9
3
10
u
+
3
V
3
-PNX5100-DDR-PLL0
2C59
33
0
u
10V
+1V2-PNX5100
100n
2C91
2C97
10
u
2C6
8
-4
100n
45
2C70-2
100n
27
2C62-1
100n
1
8
+1V2-PNX5100
5C67
3
0R
100n
+
3
V
3
+1V2-PNX5100-TRI-PLL1
2C72
+1V2-PNX5100-TRI-PLL2
+1V2-PNX5100
100n
2C75
V
SS
D_TRI_PLL1
K
3
V
SS
D_TRI_PLL2
U
3
V
SS
D_TRI_PLL
3
AD26
V
SS
_DDRPLL0
R22
V
SS
_DDRPLL1
AC1
3
V
SS
_MCAB1
AB1
3
V
SS
_MCAB2
V
SS
A_DLL7
A15
V
SS
A_LVD
S
1
C15
V
SS
A_LVD
S
2
AB19
V
SS
A_LVD
S
IN
J4
V
SS
A_TRI_PLL1
K4
V
SS
A_TRI_PLL2
U4
V
SS
A_TRI_PLL
3
AE12
V
SS
A_XTAL
J
3
VDD_1V2_DDRPLL0
N22
VDD_1V2_DDRPLL1
AB14
VDD_1V2_MCAB1
AC14
VDD_1V2_MCAB2
T22
V
SS
A_DDRPLL1
L22
V
SS
A_DLL0
AB22
V
SS
A_DLL1
E22
V
SS
A_DLL4
U22
VDDA_
3
V
3
_DDRPLL0
B15
VDDA_
3
V
3
_LVD
S
1
D15
VDDA_
3
V
3
_LVD
S
2
AB1
8
VDDA_
3
V
3
_LVD
S
IN
AD14
VDDA_
3
V
3
_
S
Y
S
_PLL
H5
VDDD_1V2_TRI_PLL1
K5
VDDD_1V2_TRI_PLL2
U5
VDDD_1V2_TRI_PLL
3
AD25
VDDA_1V2_DLL4
V22
VDDA_1V2_DLL7
E15
VDDA_1V2_LVD
S
_PLL
J5
VDDA_1V2_TRI_PLL1
L5
VDDA_1V2_TRI_PLL2
T5
VDDA_1V2_TRI_PLL
3
AF12
VDDA_1V2_UIP_PLL
AD1
3
VDDA_1V2_XTAL
AE25
Φ
PNX5100E
7C00-11
AE14
VDDA_1V2_1_7_MCAB
P22
VDDA_1V2_DDRPLL1
M22
VDDA_1V2_DLL0
AA22
VDDA_1V2_DLL1
F22
2
S
UPPLY_2
100n
2C62-2
IC
8
2
IC
83
IC
8
0
+1V2-PNX5100-LVD
S
-PLL
IC
8
1
+1V
8
-PNX5100
3
0R
5C62
2C61-1
100n
1
8
IC
8
6
IC
8
7
2C61-2
27
3
6
100n
27
100n
2C70-
3
100n
2C69-2
+
3
V
3
2C60-4
100n
45
+
3
V
3
IC
8
4
IC
8
5
T1
3
T14
T15
V25
W2
3
AE26
AC2
AC
3
AC4
P2
3
R11
R12
R1
3
R14
R15
AC1
R2
3
R25
T11
T12
N12
N1
3
N14
N15
P11
AB5
P12
P1
3
P14
P15
L1
3
L14
L15
M11
M12
AB4
M1
3
M14
M15
M25
N11
C
3
D
3
D4
E4
E5
AB
3
F25
H2
3
J25
L11
L12
AF1
B1
A10
A1
3
AA25
A17
B2
A20
C2
C25
E7
G5
M5
N5
A1
AD1
AD2
AD24
AD
3
AE1
AE2
D10
D1
3
D17
D20
AB20
V5
W5
AB6
AB7
D22
E6
AF9
E16
L16
M16
N16
P16
R16
T16
AB15
AB17
J22
K22
P5
R5
Y5
AB16
AB
8
AB9
AC9
AD9
AE9
Φ
S
UPPLY_1
PNX5100E
7C00-10
AA5
E
8
E9
F5
+
3
V
3
-PNX5100-LVD
S
-IN
3
6
+1V2-PNX5100
100n
2C60-
3
2C
8
1
100n
2C
88
100n
3
0R
5C65
45
100n
2C
8
5
3
6
100n
2C69-4
2C69-
3
100n
10
u
2C96
2C95
10
u
100n
2C6
8
-
3
3
6
+1V2-PNX5100-DLL
+
3
V
3
-PNX5100-CLOCK
2C76
100n
2C69-1
100n
1
8
+
3
V
3
+
3
V
3
-PNX5100-LVD
S
-PLL
3
1
3
9 12
3
6214.4
I_17660_0
3
1.ep
s
110
3
0
8
B05C
B05C