72
7.
Circuit Diagrams and PWB Layouts
SSB: PNX
8
541: Video Streams
7
6
5
0
4
3
2
CA_MOVAL
CA_MO
S
TRT
1
0
0
1
0
1
2
3
4
5
6
7
MIVAL
MI
S
TRT
MICLK
ERROR
VPPEN
VCCEN
ADD_EN
OOB_EN
DATA_EN
DATA_DIR
CA_R
S
T
CA_MDO
CDN
FEDATA TNR_T
S
DI
CA_MDI
CA_MICLK
CA_MI
S
TRT
CA_MIVAL
V
S
N
6
5
4
3
2
1
1
0
7
6
7
8
9
A
7H00-10 A5
9HW0 D2
B
7
8
9
1
2
3
4
5
6
B
C
D
3
HWN-2 B6
3
HWP C7
5
1
2
3
4
3
HWR-1 B7
3
HWR-2 B6
3
HWR-
3
B7
3
HWR-4 B6
3
HWV-1 B6
3
HWV-2 B7
3
HWV-
3
B7
3
HWV-4 B7
IHW0 D2
C
D
PNX
8
541: VIDEO
S
TREAM
S
E
A
E
3
HWK D2
3
HWN-1 C6
3
6
2
7
47R
3
HWR-
3
6
47R
3
HWV-2
3
HWV-
3
47R
3
47R
3
HWR-1
1
8
9HW0
8
3
HWN-1
47R
1
33
R
3
HWP
4K7
7
3
HWK
3
HWR-2
47R
2
1
8
3
HWV-1
47R
D24
A
3
0
C24
B2
8
B
3
0
B25
D25
A24
C22
B24
A2
3
C25
D2
3
C2
3
C29
C
3
0
D
3
0
A2
8
A29
A26
C27
B27
A27
A25
D26
C26
B26
C6
D6
E6
A5
B5
A6
C4
D5
D29
B2
3
D22
A22
C5
E5
A4
B4
PNX
8
541
7H00-10
B22
VIDEO
S
TREAM
S
IHW0
4
5
4
5
3
HWR-4
47R
47R
3
HWV-4
3
HWN-2
2
7
CA-MOVAL
CA-MO
S
TRT
CA-MOCLK_V
S
2
CA-MDI6
CA-MIVAL
CA-MDI5
CA-MDI7
47R
FE-ERR
+
3
V
3
-PER
CA-MI
S
TRT
CA-MDO0
CA-MDO1
CA-MDO2
CA-MDO
3
CA-MDO4
CA-MDO5
CA-MDO7
CA-MDO6
CA-MDI4
CA-MDI
3
CA-MDI2
CA-MDI1
CA-MDI0
CA-MICLK
CA-CD1
CA-CD2
CA-V
S
1
FE-ERR
FE-CLK
FE-
S
OP
FE-VALID
FE-DATA7
FE-DATA6
FE-DATA5
FE-DATA4
FE-DATA
3
FE-DATA2
FE-DATA1
FE-DATA0
CA-DATADIR
CA-DATAEN
CA-ADDEN
CA-R
S
T
3
1
3
9 12
3
6214.4
I_17660_025.ep
s
110
3
0
8
B04N
B04N