Circuit Diagrams and PWB Layouts
51
7.
SSB: Channel Decoder
OUT
IN
INH
BP
COM
4
3
2
1
XIN
XOUT
P
GPIO<0:
3
>
DO
TUN
CLR
S
ADDR
S
CL
S
DA
TCK
TDI
TDO
TM
S
TR
S
T
M
VI
MAIN
0
DEN
AGC_TUN
AGC_IF
V
SS
E
V
SS
I
S
V
SS
A_ADC
V
SS
A_O
S
C
V
SS
A_PLL
GND_H
S
V
S
A_ANA
VD
A_12_ANA
VDD
A
33
_ADC
VDDI12
VDD
33
_ADC
VDDE
33
VDD
A12_PLL
VDD
A12_O
S
C
S
DA
S
CL
P
S
YNC
OCLK
7
6
5
IT
3
1 G6
IT
3
2 G6
IT
33
H9
IT41 A7
FT
38
H
8
I2C ADDRE
SS
10
IT29 E7
IT15 D2
IT1
8
F7
IT22 D4
IT24 B7
IT25 B
8
IT26 D
3
IT27 D
3
3
T2
8
G5
3
T29 H
8
7T25 B
8
9T20 C2
FT11 C
8
FT15 A
8
FT17 G
8
FT
3
6 H
8
FT
3
7 H
8
3
T0
8
E7
3
T09 E7
FT
3
9 H
8
FT40 F9
FT41 F
3
FT42 D2
FT59 A
8
IT0
3
C7
IT07 E9
IT10 E7
IT11 C
3
3
T16 D
3
3
T1
8
G
8
3
T19 D2
3
T20 B7
3
T21 E
3
3
T2
3
F1
3
3
T26 G5
C
D
3
T
3
0 H7
3
T
3
1 I
8
3
T
3
2 I1
3
3
T
33
I12
3
T61 H4
5T0
8
C
8
5T09 A
8
7T17-1 F9
7T1
8
-1 D4
7T1
8
-2 D
3
2T29 H5
2T
3
1 E2
2T
3
2 A
8
2T
3
5 D
8
2T
3
6 D9
3
T02 H4
3
T07 H
8
7
8
9
10
11
12
1
3
A
3
T10 E7
3
T11 E7
3
T1
3
D2
3
T14 D4
E
F
G
H
I
A
B
2
3
4
5
6
7
8
9
2T24 F5
2T25 B7
2T26 D
3
2T27 B
8
2T2
8
H4
1
3
1
2
3
4
5
6
2T12 D11
2T1
3
D11
2T14 D11
2T15 D12
2T16 D11
2T1
8
E7
2T20 F6
2T21 F6
CHANNEL DECODER
B
C
D
1
RE
S
ERVED
10
11
12
E
F
G
H
I
2T01 A
8
2T04 C
8
2T05 C
8
2T07 D
8
2T0
8
D9
2T09 D9
1
8
K
3
T10
100n
2T16
100n
2T27
+1V2D
VB
+
3
V
3
DVB
10K
3
T07
10K
3
T14
FT
3
6
3
T21
56K
IT15
3
90R
3
T61
BC
8
47BPN
7T1
8
-1
2
6
1
100n
2T24
100n
2T14
FT40
IT27
IT0
3
IT07
+5V-TUN
+1V2D
VB
1
u
0
2T25
+
3
V
3
DVB
100n
2T
3
6
IT22
100n
2T
3
1
7T1
8
-2
BC
8
47BPN
5
3
4
4
2
1
3
5
7T25
LD
3
9
8
5M122
6.
3
V
2T
3
2
22
u
100n
3
T
33
4K7
RE
S
2T01
100K RE
S
9T20
FT
38
3
T19
100n
2T07
FT
3
7
IT10
2T15
100n
10K
3
T
3
0
FT15
2T0
8
100n
3
T0
8
1K
8
3
T26
100R
3
T20
3
T
3
1
10K
100K
+
3
V
3
DV
B
RE
S
2T
3
5
100n
2T29
10n
+
3
V
3
2T1
3
100n
2T2
8
10n
4K7
3
T
3
2
+1V2DVB
+
3
V
3
DV
B
2T1
8
100n
10K
3
T2
3
RE
S
RE
S
1K0
3
T09
FT42
120R
5T09
1K0
3
T16
FT
3
9
IT25
IT24
100n
2T26
100n
2T12
IT
33
+
3
V
3
DVB
2T20
100n
3
T29
10K
IT11
RE
S
IT29
+1V2D
V
B
100n
+1V2D
VB
2T04
IT
3
2
100n
2T09
+5V-TUN
+1V2-PNX
8
541
3
T02
FT11
3
90R
10K
22
u
2T05
6.
3
V
3
T11
3
T1
3
1
3
3
0
44
7
8
100K
3
1
45
2
3
47
4
6
10
14
29
3
7
3
6
4
8
5
9
11
1
2
8
46
12
19
17
33
3
5
16
3
4
15
3
9
38
40
20
21
22
2
3
24
25
26
27
49
3
2
7T17-1
TDA1004
8
HN
42
4
3
41
1
8
IT26
IT
3
1
+
3
V
3
DV
B
47n
2T21
IT41
+
3
V
3
DVB
+1V2D
V
B
FT41
FT59
5T0
8
120R
+1V2D
V
B
3
T2
8
100R
10K
3
T1
8
IT1
8
+
3
V
3
DV
B
RE
S
FT17
FE-ERR
S
CL-TUNER
FE-DATA0
RE
S
ET-
S
Y
S
TEM
JTAG-TCK-TDA1004
8
TDA-IF-AGC
TUN-AGC
TUN-AGC-MON
4-MHz
S
DA-TUNER
JTAG-TDO-TDA1004
8
JTAG-TDI-TDA1004
8
FE-DATA5
FE-DATA6
FE-DATA7
AGC-COMP
FE-CLK
FE-
S
OP
IF-N
IF-P
JTAG-TM
S
-TDA1004
8
AGC-COMP
JTAG-TR
S
T-TDA1004
8
S
DA-
SS
B
S
CL-
SS
B
FE-VALID
FE-DATA1
FE-DATA2
FE-DATA
3
FE-DATA4
3
1
3
9 12
3
6214.4
I_17660_004.ep
s
110
3
0
8
B02A
B02A