Philips PICO 19PFL3405/60, Руководство по обслуживанию

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Circuit Descriptions EN 20 TPN1.1E LA 7.
2011-Jan-21
7. Circuit Descriptions
Index of this chapter:
7.1 Introduction
7.2 Power Architecture
Notes:
• Only new circuits (circuits that are not published recently)
are described.
• Figures can deviate slightly from the actual situation, due
to different set executions.
• For a good understanding of the following circuit
descriptions, please use the wiring, block (see chapter
9. Block Diagrams ) and circuit diagrams (see chapter
10. Circuit Diagrams and PWB Layouts ).Where necessary,
you will find a separate drawing for clarification.
7.1 Introduction
The TPN1.1E LA chassis is using the NT72632 for main
processing.
7.1.1 TPN1.1E Architecture Overview
An overview of the TPN1.1E LA architecture can be found in
Figure 7-1 .
Figure 7-1 Architecture of TPN1.1E LA
1 I M D H
I M D H
N I _ A G V
0 _ r P b P Y
NT726 3 2
(LQFP-256)
3 _ N I D A
L / R ; r P / b P / Y
V / H / B / G / R
2 _ N I D A
r e n u T M M
y l n O g o l a n A
S B V C _ V T
0 _ S B V C
F I S _ V T
+ F I S
S PI Fl as h
3 2 M b
24C02
D S UB
24C02
HDMI
DDR2
512 M b
2 3 C 3 2
NVM
S 2 I
lifier p m a o i d u A
- D / + D
T N I B S U
x T / x R
• e r a p m o C
• 1 L - H U B
• d a p y e K
T U O _ C A D
C D A
He a dphone
a mplifier
4 _ N I D A
1 _ S B V C
) e d i S ( L / R ; S B V C
) t i b 8 ( D H
t u O S D V L
L / R
A u dio
T R A U
0 _ N I D A 0 _ T R A C S
T R A C S - l l u F
r e f f u B V A
l e n a p D H
• D E L / R I
O I P G
CVB S o u t &
A u dio L/R o u t
21
20
1
2
1
6
10
11
5
15
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