IC Data Sheets
8.
Figure 8-3 Pin configuration (2)
1
88
60_
3
02_100510.ep
s
1005
3
1
Pinning information
40
RXA0- 104
ADC0M 16
8
I2
S
O W
S
/ AGPIO10
2
3
2
p
a
d
b
yp
ass
1
41
RXA0+ 105
S
_C 169
I2
S
O DAT0/AGPIO09
2
33
MA4
42
RXA1- 106
S
_Y 170
LVD
S
_GND 2
3
4
MA6
4
3
RXA1+ 107
CVB
S
1 171
LVD
S
_B
3
+ 2
3
5
MA
8
44
RXA2- 10
8
CVB
S
0 172
LVD
S
_B
3
- 2
3
6
VDD_DDR
45
RXA2+ 109
F
S
ADJ 17
3
LVD
S
_BCLK+ 2
3
7
MA11
46
GND_HDMI 110
COMP 174
LVD
S
_BCLK- 2
38
MA2
47
HDMI_DDC_
S
CK/
AGPIO16
111
VDD_TVDAC 175
LVD
S
_B2+ 2
3
9
MRA
S
#
4
8
HDMI_DDC_
S
DA/
AGPIO1
3
112
TV_OUT 176
LVD
S
_B2- 240
MA9
49
PWR5V/ AGPIO51
11
3
GND_TVDAC 177
LVD
S
_B1+ 241
MA5
50
HDMI_CEC(IO)/
AGPIO52
114
VDD_12 17
8
LVD
S
_B1- 242
MA12
51
S
TBC_VDD_12 115
VDD_
33
179
LVD
S
_B0+ 24
3
DDR_VREF
52
S
TBC_VDD_
33
116
S
/PDIFO(O)/ GPIO10
1
8
0
LVD
S
_B0- 244
MCLK
5
3
S
PI_W
S
(IO)/ AGPIO5
3
117
ADIN_L0 1
8
1
LVD
S
_VCC 245
MCLK#
54
S
PI_HOLD(IO)/
AGPIO54
11
8
ADIN_R0 1
8
2
LVD
S
_A
3
+ 246
MA7
55
S
PI_C
S
119
ADIN_L1 1
83
LVD
S
_A
3
- 247
MA
3
56
S
PI_CLK 120
ADIN_R1 1
8
4
LVD
S
_ACLK+ 24
8
VDD_DDR
57
S
PI_DI 121
ADIN_L2 1
8
5
LVD
S
_ACLK- 249
MA1
5
8
S
PI_DO 122
ADIN_R2 1
8
6
LVD
S
_A2+ 250
MA10
59
MCU_GPIO1 12
3
ADIN_L
3
1
8
7
LVD
S
_A2- 251
MBA0
60
MCU_GPIO0 124
ADIN_R
3
1
88
LVD
S
_A1+ 252
MBA1
61
S
TBC_IRR(I)/ AGPIO55
125
ADIN_L4 1
8
9
LVD
S
_A1- 25
3
MWE#
62
RTC_UART_RX(I)/
AGPIO5
8
126
ADIN_R4 190
LVD
S
_A0+ 254
VDD_DLL
6
3
RTC_UART_TX(O)/
AGPIO57
127
REFIN 191
LVD
S
_A0- 255
MDQ4
64
S
AR_ADC0 12
8
VMID 192
LVD
S
_GND 256
MDQ
3