Philips CEM2100/00, Руководство по обслуживанию

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19.2 Command Sequence
The command sequence in the MCU and the serial PROM modes consists of six commands (JEDEC compatible),
as shown in Table 19-2. Addresses specified in the command sequence are recognized with the lower 12 bits
(excluding BA, SA, and FF7FH used for security program). The upper 4 bits are used to specify the flash memory
area, as shown in Table 19-3.
Note 1: Set the address and data to be written.
Note 2: The area to be erased is specified with the upper 4 bits of the address.
19.2.1 Byte Program
This command writes the flash memory for each byte unit. The addresses and data to be written are specified
in the 4th bus write cycle. Each byte can be programmed in a maximum of 40
µ
s. The next command sequence
cannot be executed until the write operation is completed. To check the completion of the write operation, per-
form read operations repeatedly until the same data is read twice from the same address in the flash memory.
During the write operation, any consecutive attempts to read from the same address is reversed bit 6 of the data
(toggling between 0 and 1).
Note:To rewrite data to Flash memory addresses at which data (including FFH) is already written, make sure to
erase the existing data by "sector erase" or "chip erase" before rewriting data.
19.2.2 Sector Erase (4-kbyte Erase)
This command erases the flash memory in units of 4 kbytes. The flash memory area to be erased is specified
by the upper 4 bits of the 6th bus write cycle address. For example, in the MCU mode, to erase 4 kbytes from
7000H to 7FFFH, specify one of the addresses in 7000H-7FFFH as the 6th bus write cycle. In the serial PROM
mode, to erase 4 kbytes from 7000H to 7FFFH, set FLSCR<BANKSEL> to "0" and then specify one of the
addresses in F000H-FFFFH as the 6th bus write cycle. The sector erase command is effective only in the MCU
and serial PROM modes, and it cannot be used in the parallel PROM mode.
Table 19-2 Command Sequence
Command
Sequence
1st Bus Write
Cycle
2nd Bus Write
Cycle
3rd Bus Write
Cycle
4th Bus Write
Cycle
5th Bus Write
Cycle
6th Bus Write
Cycle
Address Data Address Data Address Data Address Data Address Data Address Data
1 Byte program 555H AAH AAAH 55H 555H A0H
BA
(Note 1)
Data
(Note 1)
- - - -
2
Sector Erase
(4-kbyte Erase)
555H AAH AAAH 55H 555H 80H 555H AAH AAAH 55H
SA
(Note 2)
30H
3
Chip Erase
(All Erase)
555H AAH AAAH 55H 555H 80H 555H AAH AAAH 55H 555H 10H
4 Product ID Entry 555H AAH AAAH 55H 555H 90H - - - - - -
5
Product ID Exit XXH F0H - - - - - - - - - -
Product ID Exit 555H AAH AAAH 55H 555H F0H - - - - - -
6 Security Program 555H AAH AAAH 55H 555H A5H FF7FH 00H - - - -
Table 19-3 Address Specification in the Command Sequence
Operating Mode
FLSCR
<BANKSEL>
Specified Address
MCU mode Don’t care 1***H-F***H
Serial PROM mode
0
(BANK0)
9***H-F***H
1
(BANK1)
8***H-F***H