Circuit Description
GB 97
A10PTV2.0 NTSC
9.
9.9
Audio Signal Flow
All of the Audio switching is done on the SSB Panel. IF from
the Main Tuner is fed to 1455, Audio Saw Filter and then to
7301 for detection and demodulation. Baseband audio is
buffered by 7307 and fed to Pin 50 of 7651, Audio Processor.
Two Aux signals from the Rear Jack Panel and one channel
from the Side Jack Panel can be fed to the switch inside the
IC. A single channel audio signal from the PIP/DW Panel is
fed to the IC on Pin 47. The Audio Processor is capable of
processing all analog TV standards worldwide, as well as the
NICAM digital standard. In the Auto mode, the IC is capable
of automatically detecting the Audio standard. An AVC
(Automatic Volume Correction) circuit in the IC corrects for
changes in audio levels from different program sources.
When the AVC circuit turned On, a fixed output of -18 dB will
be maintained for an input varying from -24 dB to 0 dB. That
is with an input level of 0 dB being 2 volts rms and the output
level of 0 dB being 1.4 volts rms. Pins 21 and 20 are the
outputs to the Audio Amplifier. Pins 18 and 17 are output to
the Headphone Amplifier while Pin 23 is a line level output for
a Subwoofer. The Subwoofer channel is developed by
combining the Left and Right Audio channels and sending it
through a Low Pass Filter. The Audio Amplifier, Headphone,
and Subwoofer are all tied to an internal volume control. The
SC1_OUT_R and SC1-OUT-L are fixed line level outputs,
which are fed to the Audio Output on the Rear Jack Panel.
The Aux out, Headphone, or Speaker output can be driven by
different sources as selected by the user. For example, the
user can be listening to the Audio from the main picture
through the speakers and listening to the PIP Audio through
the Headphones.
Audio from 7651 on the SSB Panel is fed to the Audio
Amplifier on the SSM Panel. The Audio is input on Pins 7 and
11 and output on Pins 4 and 2. The IC is powered by a 40
volt AMP-VCC supply from the Full Power Supply. When the
set is turned off, the Standby line goes high causing Pin 5 of
7402 to be approximately 40 volts. This shuts the Amplifier
completely off, preventing a POP in the speakers. When the
set is turned On, the Standby line is High, turning 7405 Off,
switching 7410 On. The Sound-Enable line is High, turning
7401 On. Pin 5 of 7402 will then be approximately 32 volts.
Audio will be present on the output of 7402. If the user
presses the Mute button, the Sound-Enable line will go low
causing 7401 to turn off. Pin 5 of 7402 will then go to
approximately 36 volts, muting the output.
The output of the Amplifier is fed to a Center Amp Switch
Panel. When the switch is in the internal position, Left and
Right Audio is routed to the internal speakers. In the External
position, the Left and Right Internal speakers are connected
in series with the Center Amp Input on connector 1000.
Left and Right Headphone Audio is fed to 7403 and then to
the Headphone Jack on the Side Jack Panel. Sub-woofer
audio is buffered by 7415 before being fed to the Rear Jack
Panel.
Figure 9-22
9.10 Microprocessor
The Microprocessor (Painter), 7064, is located on the SSB
Panel. The User communicates with the Microprocessor via
the Remote Control or the Front Keyboard. The Keyboard is
a resistor latter which produces a voltage level change on Pin
5 when the User makes a selection. The Remote Receiver
is located on the Front Panel. The Program to run the set is
loaded in the ROM in the Microprocessor. User settings,
Geometry settings, Options Codes to identify the set, Error
Codes, Tuner and Audio settings, and Cutoff settings are
stored in the Memory IC 7066. The Microprocessor
communicates with the Memory IC via an I2C buss. The
Microprocessor communicates with the rest of the set via to
I2C busses on Pins 82, 81, and 84, 83. Additional
communications with the set is done through six analog
control lines, STAND-BY, SEL-MAIN-FRNT-RR, SEL-MAIN-
R1R2, SOUND-ENABLE, SYS1 AND SYS2. The STAND-
BY line goes Low to turn the set on. On Screen Display
(OSD) is output on Pins 46, 47, and 48 of the IC. Sync for
this display is input on Pins 53 and 55.
CL 06532143_029.eps
081100
