Philips A02U AA, Руководство по обслуживанию

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Circuit Descriptions, Abbreviation List, and IC Data Sheets EN 100 A02U AA 9.
9.2
Block Diagrams
Figure 9-3 Chassis block diagram
The tuner is a PLL tuner and delivers the IF-signal, via a SAW-
filter, to the MPIF IC (Multi Platform InterFace). This is an
analog video and audio pre-processing unit for the ADOC TV
processor. It contains the high frequent IF part and all the
analog video and audio source switching for external in- and
outputs. The MPIF can handle CVBS, Y/C, RGB (1fH/2fH) and
YPbPr (1fH/2fH) video signals as well as stereo, I2S, and
second sound IF audio signals. The MPIF converts the
selected video and audio streams from the analog to the digital
domain. Via three high-speed serial data links (I2D), the
digitized audio and video signals are streamed to the ADOC IC
for further processing.
The ADOC (Analog Digital One Chip) is a fully integrated,
digitally implemented TV processor for audio, video, VBI
(Vertical Blanking Interval) services, graphics, and control. It is
a global, multi-standard system primarily designed for the
reception and processing of analog broadcast signals.
Internal video processing is done in the ADOC with YUV-
signals. It also handles the video control, geometry part, and
the insertion of the TXT/CC/OSD RGB-signals. The video part
delivers the RGB signals to the CRT-panel and the geometry
part delivers the H-drive, V-drive (differential output), and E/W-
drive.
An integrated MIPS 1910 processor runs the chassis software
and takes care of the set control, error generation TXT/CC/
OSD input-, and output processing. The NVM (Non Volatile
Memory) is used to store the settings, the Flash-RAM contains
the set software, and the SDRAM stores the Teletext pages (in
some versions, this is stored in the internal memory of the
ADOC).
Both deflection circuits are located on the LSP and are driven
by the ADOC. The horizontal output stage generates also
some supply voltages and the EHT-, focus- and Vg2-voltages.
The RGB amplifiers on the CRT-panel are integrated in one IC
and are supplied with 200 V from the LOT. The SCAVEM circuit
modulates transitions of the Luminance (Y) signal on the
horizontal deflection current, giving a sharper picture.
Sound IF processing, audio source selection, and audio
analog-digital signal conversions are done in the MPIF IC. The
ADOC contains a digital TV sound processor for analog and
digital multi-channel sound systems in TV sets. By hardware
programming, several applications can be scaled.
The audio output stage is built around a balanced amplifier,
and is located on the LSP. It uses a monolithic integrated power
amplifier IC, the TDA7497. The gain of the amplifier is constant.
This means that volume control is done via the ADOC.
There is a separate Standby Supply, in order to reduce the
Standby power consumption. During Standby, the Main Supply
is switched "off" (via TS7529).
A relay (1550) is used to switch the Degaussing circuit. It is
switched "on" after set start-up and switched "off" by the
microprocessor after 12 s.
The Main Supply, a SMPS based on the "boost converter"
principle, generates the 140 V (V_BAT) and the +/- 28 V for the
audio part.
9.3
Power Supply
9.3.1
Introduction
The power supply circuitry is located on the large signal PWB,
together with the audio amplifier and the deflection. It
comprises of:
•
Mains entrance with fuse.
•
Separate standby -supply.
•
Mains harmonic circuit.
•
Mains rectifier.
•
Main-supply: is able to deliver a continuous power between
100 W and 160 W.
•
Degaussing.
For a detailed circuit description, see the R8 (NAFTA) or EM5
(EU & AP) Service Manual.
9.3.2
Power Supply architecture
The A02 SSB is supplied by +5V, +5.2V, +3.3V and +8V supply
lines from the LSP. The SSB contains:
•
A DC/DC converter which steps down +5.2V to +1V8,
•
A switch to cut off the 3V3 supply to the 3D Comb in
"Standby" mode, and
•
A regulator to generate the 2V5.
When the set is in "Power STANDBY" mode, the +5.2V, +3.3V
supply lines are present. Consequently, only the ADOC IC
(+3V3 and +1V8), the SDRAM (+3V3), the Flash memory
(+3V3), and the NVM memory (+3V3) are supplied. Other than
NVM, all the other devices are powered down in "Standby"
mode. See section below for more details on the power modes.
OFF Mode
The set is completely switched "off" from the mains. This is
done with the mains switch for Europe and AP (for NAFTA it
would mean disconnecting the TV from the mains by pulling out
the mains cable). Depending upon the last Standby Status
(stored in NVM), this mode can transit to "on" mode or
"STANDBY" mode.
The transition timing for a Cold start from "off" state to "on" shall
be such that from the instance the ADOC gets a hard reset,
within 3 seconds one will hear the audio and within 7 seconds
one will see the picture.
ON Mode
This is the normal operating mode. All the power supply lines
on the A02 SSB and LSP are available. All the circuits in the set
are active. From this mode, it is possible to transit to
"STANDBY", ""SEMI-STANDBY", "PROTECTION", or "OFF"
mode.
STANDBY Mode
The total power consumption of the TV set in this mode is equal
or less than 1 W. The LED will indicate the Standby state. In
this state only the ADOC, SDRAM, Program Memory, NVM,
and all means to wake-up the set are powered. Rest of the A02
sub-systems is disconnected. A STANDBY control port
controls this.
The transition timing from "STANDBY" to "ON" state is such
that within 3 seconds, one will hear the audio and within 7
seconds, one will see the picture. From this mode, it is possible
to transit to "ON", "SEMI-STANDBY", or "OFF" mode.
SEMI-STANDBY Mode
All the circuits in the set (ADOC, MPIF, etc), except the Audio
output, Deflection, and hence CRT display, are powered up
and fully active. The Audio Mute is activated. The set, however,
Tuner/SAW
Tuner/SAW
IF/
Mono Sound
MPIF ADOC
SDRAM
RGB
Amp.
Audio
Amp.
2nd tuner
PIP-channel
FLASH
CL 36532058_064.eps
281003
NVM
Local
keyboard
IR
7730
(TXT)
7790
(SET SW)
7525
(SETTINGS)
R
G
B