Circuit Descriptions
EN 58
Q552.2L LA
7.
2012-Mar-16
back to
div. table
•
RT control
•
HPD control
•
Sync detection
•
TMDS output control
•
CEC control
•
EDID stored in Sil9x87, therefore there are no EDID pins
on the SSB.
7.7
Video and Audio Processing - PNX855xx
The PNX855xx is the main audio and video processor (or
System-on-Chip) for this platform. It has the following features:
•
Multi-standard digital video decoder (MPEG-2, H.264,
MPEG-4)
•
Integrated DVB-T/DVB-C channel decoder
•
Integrated CI+
•
Integrated motion accurate picture processing (MAPP2)
•
High definition ME/MC
•
2D LED backlight dimming option
•
Embedded HDMI HDCP keys
•
Extended colour gamut and colour booster
•
Integrated USB2.0 host controller
•
Improved MPEG artefact reduction compared with
PNX8543
•
Security for customers own code/settings (secure flash).
The TV550 combines front-end video processing functions,
such as DVB-T channel decoding, MPEG-2/H.264 decode,
analog video decode and HDMI reception, with advanced
back-end video picture improvements. It also includes next
generation Motion Accurate Picture Processing (MAPP2). The
MAPP2 technology provides state-of-the-art motion artifact
reduction with movie judder cancellation, motion sharpness
and vivid colour management. High flat panel screen
resolutions and refresh rates are supported with formats
including 1366 × 768 @ 100Hz/120Hz and 1920 × 1080 @
100Hz/120Hz. The combination of Ethernet, CI+ and H.264
supports new TV experiences with IPTV and VOD. On top of
that, optional support is available for 2D dimming in
combination with LED backlights for optimum contrast and
power savings up to 50%.
For a functional diagram of the PNX855xx, refer
to
Figure 7-9
.
Figure 7-9 PNX855xx functional diagram
7.8
Ambilight
Sets in the xxPFL7606D/xx range are equipped with Ambilight.
For the implementation of Ambilight, refer to
Figure 7-10
.
18770_241_100201.eps
111103
TS out/in for
TS input
CVBS, Y/C,
LVDS for
analog CVBS
SPDIF
Low-IF
SSIF, LR
HDMI
CI/CA
MPEG
PRIMARY
LVDS
VIDEO
SECONDARY
MEMORY
VIDEO
3D COMB
DIGITAL IF
AUDIO DEMOD
AUDIO IN
HDMI
SCALER,
AUDIO DSP
AUDIO DACS
AUDIO OUT
450 MHz
560 MHz
I
2
C
PWM GPIO
IR
ADC
UART
I
2
C
GPIO Flash
analog audio
I
2
S
SPDIF
SYSTEM
USB 2.0
PNX85500x
DVB-T/C
channel decoder
DVB
AV-PIP
SPI
MPEG/H.264
RECEIVER
(8051)
CONTROLLER
AND DECODE
DECODER
PCMCIA
RGB
PROCESSOR
SYSTEM
CONTROLLER
DECODER
VIDEO
24KEf CPU
MIPS32
x 8
AV-DSP
REDUCTION
AND NOISE
DE-INTERLACE
OUTPUT
VIDEO
SUB-PICTURE
ENCODER
OUTPUT
VIDEO
quad channel)
(single, dual or
flat panel display
DRAWING
ENGINE
DMA BLOCK
Motion-accurate
pixel processing
SD
Memory
Card
Ethernet
MAC
Содержание 32PFL7606D/78
Страница 54: ...Circuit Descriptions EN 54 Q552 2L LA 7 7 1 3 SSB Cell Layout 19110_052_110421 eps 110421 ...
Страница 64: ...IC Data Sheets EN 64 Q552 2L LA 8 8 5 Diagram 10 8 2 DC DC B03B TPS53126PW IC7U03 Block diagram ...
Страница 65: ...IC Data Sheets EN 65 Q552 2L LA 8 8 6 Diagram 10 8 5 DC DC B03E ST1S10PH IC 7UD0 Block diagram ST1S10PH ...
Страница 70: ...IC Data Sheets EN 70 Q552 2L LA 8 Personal Notes ...