10.
Circuit Diagrams and PWB Layouts
SMB: Ethernet Switch
1
888
0_5
3
6_10100
8
.ep
s
101020
Ethernet
S
witch
B2
3
2010-05-14
0.4
BUH NAFTA 2k10 v0.4
017G MB 4 ZW
Ethernet
S
witch
B2
3
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
RXIN4
RXIP1
TXOP0
TXON0
TXOP2
RXIP2
RXIP0
TXOP1
RXIN1
TXON1
RXIN2
TXOP4
TXON2
RXIP4
TXON4
RXIN0
S
DA_
M
DI
O
S
CL_M
DC
CK25MOUT
DUP
3
_G
Y
M
O
D
E
PHY2PTXEN
83
06
S
DM_X2
PHY2PRXDV
PHY2PRXD
3
IR
Q
B
2_ENDEFER
GX
MOD
E
EN_AUTOXOVER
P4MODE0
DTE
S
T2
ACT0_BCINDROP
P4MODE1
DI
S
DUALMII
DTE
S
T1
83
06
S
DM_X1
RE
S
ET_OUT
b
PHY2PTXEN
DI
S
DUALMII
P4MODE1
P4MODE0
GXMODE
DUP
3
_GYMODE
LED_ACT0_N
ACT0_BCINDROP
EN_AUTOXOVER
PHY2PRXDV
PHY2PRXD
3
IRQB2_ENDEFER
WP
S
CL_MDC
S
DA_MDIO
TXOP4
TXON4
RXIN4
L
E
D_
ADD2
EPHY_TDN
EPHY_TDP
LED_ADD1
ACT2_P4ANEG
ACT1_GY
S
PD
ACT2_P4ANEG
LED_ADD2
ACT1_GY
S
PD
LED_ADD1
RXIP4
EPHY_RDP
EPHY_RDN
IRQB2
TXOP2
TXON2
RXIP2
RXIN2
RXIN1
RXIP1
TXOP1
TXON1
D
3
.
3
V
D
3
.
3
V
D
3
.
3
V
D
3
.
3
V
A1.
8
V_RTL
A1.
8
V_RTL
D1.
8
V_RTL
D1.
8
V_RTL
D
3
.
3
V
D
3
.
3
V
D
3
.
3
V
D
3
.
3
V
A1.
8
V_RTL
A1.
8
V_RTL
A1.
8
V_RTL
D
3
.
3
V
D
3
.
3
V
A2.5V
A1.
8
V_RTL
D
3
.
3
V
RE
S
ET_OUT
b
[1
3
]
P4FLCTRL_CPUINT#
[
8
,12]
EPHY_TDP
[16]
EPHY_TDN
[16]
EPHY_RDP
[16]
EPHY_RDN
[16]
TXOP0
[24]
TXON0
[24]
RXIP0
[24]
RXIN0
[24]
IRQB2
[1
2,
21]
DI
S
DUALMII
R15: P
u
ll low in MAC5 PHY Mode
Config
u
r
a
tion,intern
a
l p
u
ll high
P4MODE[1]
R14: Flo
a
ting in MAC5 PHY Mode
Config
u
r
a
tion, intern
a
l p
u
ll high
R5
3
: Flo
a
ting in MAC5 PHY Mode
Config
u
r
a
tion, intern
a
l p
u
ll high
GYMODE
GXMODE
P4MODE[0]
R1
3
: P
u
ll low in MAC5 PHY Mode
Config
u
r
a
tion,intern
a
l p
u
ll high
R54: P
u
ll low in MAC5 PHY Mode
Config
u
r
a
tion,intern
a
l p
u
ll high
R496
33
0
R447
0
R447
0
C5
3
0
0.1
u
F
C5
3
0
0.1
u
F
CM29
17@100,0
8
05,4A
CM29
17@100,0
8
05,4A
C524
1
8
pF
C524
1
8
pF
R44
8
49.9,1%
R44
8
49.9,1%
FB
33
60@100MHz/0
8
05/
3
A
FB
33
60@100MHz/0
8
05/
3
A
C519
0.1
u
F
C519
0.1
u
F
U5
3
LAN0072-50
U5
3
LAN0072-50
RDCT
3
RD+
1
RD-
2
TDCT
4
TD-
6
TD+
5
RX+
12
RX-
11
RXCT
10
TXCT
9
TX+
8
TX-
7
C607
0.1
u
F
C607
0.1
u
F
R
420
10K
R
420
10K
C527
0.1
u
F
C527
0.1
u
F
R42
3
*
470
R42
3
*
470
R424
470
R424
470
C5
3
7
0.1
u
F
C5
3
7
0.1
u
F
C515
0.1
u
F
C515
0.1
u
F
C
146
1nF
/50v
C
146
1nF
/50v
C5
3
4
0.1
u
F
C5
3
4
0.1
u
F
J
33
*
RJ45
J
33
*
RJ45
TX_CT
R5
TX_+
R1
TX_-
R2
RX_+
R
3
RX_-
R4
RX_CT
R6
LED1(Y)_CAT-
L1
LED1(Y)_AN+
L2
LED2(G)_CAT-
L
3
LED2(G)_AN+
L4
NC1
M
3
NC2
M4
S
hield1
M1
S
hield2
M2
R7
R7
R
8
R
8
R9
R9
R10
R10
R50
3
49.9,1%
R50
3
49.9,1%
R
421
1.
5K
R
421
1.
5K
C5
3
5
0.1
u
F
C5
3
5
0.1
u
F
C516
0.1
u
F
C516
0.1
u
F
R505
49.9,1%
R505
49.9,1%
R427
*
1K
R427
*
1K
R4
33
*
1K
R4
33
*
1K
C
3
94
*
22
u
F/6.
3
V
C
3
94
*
22
u
F/6.
3
V
R479
1M
R479
1M
R4
3
0
*
100
R4
3
0
*
100
R
425
0
R
425
0
RD
3
0
*
1K
RD
3
0
*
1K
1
3
2
C520
0.1
u
F
C520
0.1
u
F
C1
4
8
1nF
/50v
C1
4
8
1nF
/50v
R450
49.9,1%
R450
49.9,1%
R4
3
4
*
0
R4
3
4
*
0
C5
3
1
0.1
u
F
C5
3
1
0.1
u
F
R626
0
R626
0
R426
1K
R426
1K
R
422
1.
5K
R
422
1.
5K
R
445
*
10K
R
445
*
10K
C52
8
0.1
u
F
C52
8
0.1
u
F
R4
3
1
*
100
R4
3
1
*
100
+
EC25
33u
F
+
EC25
33u
F
C5
88
0.1
u
F
C5
88
0.1
u
F
R419
470
R419
470
C522
0.1
u
F
C522
0.1
u
F
L40
L40
LECM2012D-900QT
2
3
4
1
R4
3
9
10K
R4
3
9
10K
R497
33
0
R497
33
0
R451
49.9,1%
R451
49.9,1%
C517
0.1
u
F
C517
0.1
u
F
L24
L24
LECM2012D-900QT
2
3
4
1
Y
3
25MHz
Y
3
25MHz
1
3
2
4
C5
8
7
0.1
u
F
C5
8
7
0.1
u
F
R501
49.9,1%
R501
49.9,1%
C5
3
2
0.1
u
F
C5
3
2
0.1
u
F
C525
1
8
pF
C525
1
8
pF
J
3
2
RJ45
J
3
2
RJ45
TX_CT
R5
TX_+
R1
TX_-
R2
RX_+
R
3
RX_-
R4
RX_CT
R6
LED1(Y)_CAT-
L1
LED1(Y)_AN+
L2
LED2(G)_CAT-
L
3
LED2(G)_AN+
L4
NC1
M
3
NC2
M4
S
hield1
M1
S
hield2
M2
R7
R7
R
8
R
8
R9
R9
R10
R10
R4
3
7
49.9,1%
R4
3
7
49.9,1%
R500
49.9,1%
R500
49.9,1%
C60
8
0.1
u
F
C60
8
0.1
u
F
R49
8
33
0
R49
8
33
0
RD
3
1
*
1K
RD
3
1
*
1K
1
3
2
R504
49.9,1%
R504
49.9,1%
C5
3
6
0.1
u
F
C5
3
6
0.1
u
F
FB
3
2
*
60@100MHz/0
8
05/
3
A
FB
3
2
*
60@100MHz/0
8
05/
3
A
RD
33
1K
RD
33
1K
1
3
2
C
144
1nF
/50v
C
144
1nF
/50v
C609
0.1
u
F
C609
0.1
u
F
C526
0.1
u
F
C526
0.1
u
F
L41
L41
LECM2012D-900QT
2
3
4
1
R4
3
5
0
R4
3
5
0
R502
49.9,1%
R502
49.9,1%
+
EC26
33u
F
+
EC26
33u
F
C529
0.1
u
F
C529
0.1
u
F
C514
0.1
u
F
C514
0.1
u
F
C51
8
0.1
u
F
C51
8
0.1
u
F
R5
9
0
*
0
R5
9
0
*
0
R4
3
2
1.96K,1%
R4
3
2
1.96K,1%
C
3
92
22
u
F/6.
3
V
C
3
92
22
u
F/6.
3
V
R44
3
49.9,1%
R44
3
49.9,1%
RTL
83
06G
U47
RTL
83
06G-GR
RTL
83
06G
U47
RTL
83
06G-GR
TXON[2]
20
RXIN[4]
3
0
RXIN[0]
2
RXIP[0]
3
AVDD1
8
1
AGND
4
TXOP[0]
5
TXON[0]
6
TXOP[1]
10
AVDD1
8
8
TXON[1]
9
AGND
11
RXIP[1]
12
RXIN[1]
1
3
AVDD1
8
14
AVDD1
8
15
RXIN[2]
16
RXIP[2]
17
AGND
1
8
TXOP[2]
19
AVDD1
8
7
AVDD1
8
21
AVDD1
8
22
TXON[
3
]
2
3
TXOP[
3
]
24
AGND
25
RXIP[
3
]
26
RXIN[
3
]
27
AVDD1
8
2
8
AVDD1
8
29
RXIP[4]
3
1
AGND
3
2
TXOP[4]
33
TXON[4]
3
4
AVDD1
8
3
5
ITE
S
T1(IN
3
6)
3
6
ITE
S
T2(U
S
EANA50)
3
7
ITE
S
T
3
(CPR
S
T
38
DGND
3
9
RE
S
ET#
40
ITE
S
T4(NoRMIICK)
41
DI
S
DUALMII(mode
s
et4)
42
DVDD1
8
4
3
P4MODE[1](mode
s
et
3
)
44
P4MODE[0](mode
s
et2)
45
P4FLCTRL/CPU_Interr
u
pt#
46
P4
S
PD
S
TA
47
P4FULL(HOME_CR
S
)
4
8
P4LNK
S
TA#
49
DGND
50
MTXC/PRXC(CTRL_REFCLK1)
51
M(R)TXEN/PRXDV
52
DVDD1
8
5
3
M(R)TXD[0]/PRXD[0]/LEDMODE[0]
54
M(R)TXD[1]/PRXD[1]/LEDMODE[1]
55
MTXD[2]/PRXD[2]/P4IRTAG[0]
56
MTXD[
3
]/PRXD[
3
]/P4IRTAG[1]
57
MCOL/PCOL
5
8
MRXC/PTXC/REFCLK1
59
MRXDV/PTXEN/CR
S
DV
60
M(R)RXD[0]/PTXD[0]
61
DVDD
33
62
M(R)RXD[1]/PTXD[1]
6
3
DGND
64
ITE
S
T5(CPT
S
T)
65
MRXD[2]/PTXD[2]
66
MRXD[
3
]/PTXD[
3
]
67
S
EL_MIIMAC#/DI
S
D
S
PRI
6
8
EN_AUTOXOVER
69
DVDD1
8
70
EN_R
S
T_BLNK
71
ITE
S
T6(MONFCQ)
72
ENEEPROM/PHY2PRXD[0]/M(R)2TXD[0]
7
3
S
CL_MDC
74
S
DA_MDIO
75
GXENFC/PHY2PRXD[1]/M(R)2TXD[1]
76
GYENFC/P2RXD[2]/M2TXD[2]
77
ENBKPR
S
/P2RXD[
3
]/M2TXD[
3
]
7
8
DGND
79
DI
S
BRDCTRL/PHY2PRXDV/M(R)2TXEN
8
0
PHY2PRXC/M2TXC/CTRL_REFCLK2
8
1
PHY2PTXC/M2RXC/REFCLK2
8
2
DI
S
PORTPRI[0](P2TXEN/M2RXDV/CR
S
DV2)
83
DI
S
PORTPRI[1](PHY2PTXD[0]/M(R)2RXD[0])
8
4
DI
S
PORTPRI[2](PHY2PTXD[1]/M(R)2RXD[1])
8
5
DI
S
PORTPRI[
3
](PHY2PTXD[2]/M2RXD[2])
8
6
DVDD
33
8
7
DI
S
PORTPRI[4](PHY2PTXD[
3
]/M2RXD[
3
])
88
LED_BLNK_TIME/PHY2PCOL/M2COL
8
9
ENDEFER/LOOPLED#
90
DI
S
TAGPRI/LED_ADD[4]
91
DI
S
HOMEPLUG/LED_ACT[4]
92
DI
S
VLAN/LED_
S
PD[4]
9
3
DGND
94
S
ETGROUP/LED_DUP[4]
95
MODE
S
ET[1]/LED_ADD[
3
]
96
EN4
8
PA
SS
1/LED_ACT[
3
]
97
DI
S
ARP/LED_
S
PD[
3
]
9
8
LED_DUP[
3
]/GYMODE(mode
s
et0)
99
DVDD1
8
100
LED_ACT[2]/P4ANEG
10
3
LED_
S
PD[2]/GXANEG
104
LED_DUP[2]/GYANEG
105
DVDD
33
106
LED_ADD[1]/GX
S
PD100
107
LED_ACT[1]/GY
S
PD100
10
8
LED_
S
PD[1]/GXFULL
109
LED_DUP[1]/GYFULL
110
LED_ADD[0]/ENFORWARD
111
DGND
112
LED_ACT[0]/BCINDROP
11
3
LED_
S
PD[0]/MAX15
3
6
114
LED_DUP[0]
115
CK25MOUT
116
O
S
CI
117
HVDD
33
11
8
AVDD1
8
119
X1
120
X2
121
AGND
122
VCTRL
12
3
DTE
S
T2
124
DTE
S
T1
125
AGND
126
IBREF
127
AVDD1
8
12
8
DI
S
LEAKY/LED_ADD[2]
101
DGND
102
RD
3
2
1K
RD
3
2
1K
1
3
2
R499
33
0
R499
33
0
C521
0.1
u
F
C521
0.1
u
F
C
150
1nF
/5
0v
C
150
1nF
/5
0v
C5
33
0.1
u
F
C5
33
0.1
u
F
R42
8
1K
R42
8
1K
C606
0.1
u
F
C606
0.1
u
F
R429
*
0
R429
*
0
RD29
1K
RD29
1K
1
3
2
C52
3
10
u
F/10V
C52
3
10
u
F/10V
L42
L42
LECM2012D-900QT
2
3
4
1
R41
8
1K
R41
8
1K
R4
3
6
49.9,1%
R4
3
6
49.9,1%
U46
*
24LC04
U46
*
24LC04
A0
1
A1
2
A2
3
GND
4
S
DA
5
S
CL
6
WP
7
VCC
8
R442
*
0
R442
*
0