3040/V35
139001UA
A-4
A
PPENDIX
P
ATTON
E
LECTRONICS
C
O
.
I
NSTALLATION
A
ND
O
PERATIONS
M
ANUAL
Master DCE / Sub-Channel DCE Interface Flow Diagram
Master DCE / Sub-Channel DTE Interface Flow Diagram
Master RX Clock
Selection Logic
Master TX Clock
Selection Logic
Master Port is a DCE
Switch Control
+8v
Channel Port is a DCE
+8v
Pins R,T RD
Pins P,S TD
Pin C RTS
Pin D CTS
Pin E DSR
Pin F DCD
Pin H DTR
Pins Y,AA TT
Pins V,X RT
Pins U,W ETT
Pins R,T RD
Pins P,S TD
Pin C RTS
Pin D CTS
Pin E DSR
Pin F DCD
Pin H DTR
Pins Y,AA TT
Pins V,X RT
Pins U,W ETT
Clk In
Clk Out
Master RX Clock
Selection Logic
Master TX Clock
Selection Logic
Master Port is a DCE
+8v
Switch Control
Channel Port is a DTE
+8v
Buffer
Pins R,T RD
Pins P,S TD
Pin C RTS
Pin D CTS
Pin E DSR
Pin F DCD
Pin H DTR
Pins Y,AA TT
Pins V,X RT
Pins U,W ETT
Pins R,T RD
Pins P,S TD
Pin C RTS
Pin D CTS
Pin E DSR
Pin F DCD
Pin H DTR
Pins Y,AA TT
Pins V,X RT
Pins U,W ETT