Panasonic KX-TDA0170, Руководство по обслуживанию

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While BELL signal is issued, when SLT is on hook, U52 (1, 2, and 6
pin) is off. When SLT is taken off the hook, DC loop is formed
because 30V is superimposed on BELL signal; then, current flows
into R52 R58 D51 U52, and U52 (1, 2, and 6 pin) becomes
on.
When U52 (1, 2, and 6 pin) has become on, because the base of
Q57 that is the driver of BELL relay becomes L, BELL relay will be
in ‘break’ state and SLT current-supply circuit feeds current to
SLT.
- DTMF signal detecting circuit
Each port has its DTMF receiver.
Ports A to D carry out detection at IC501, and ports E to H do that
at IC502.
That DTMF data has become valid at EST terminal = H is detected
by CPU by way of CODEC ASIC, and then CPU reads and
detects the data of DTMF receiver.
- 2W-4W converting circuit
This circuit converts between the 2-line audio signal of APT or
SLT and the 4-line audio signal on CODEC.
The audio signal from SLT is input to the differential amplifying
circuit of IC1 (1, 2, and 3 pin) by way of C55 and C56, and its
output is input to CODEC.
CODEC output is issued to SLT in the form of the synthesis of the
signal that is output by way of R63 and the one that is reversely
output by IC1 (5, 6, and 7 pin). Programmable frequency
characteristic adjusting filter, sidetone removing filter, and return
loss compensating filter are included in CODEC.
8.3. Power Supply Circuit
8.3.1. DC/DC Converting Circuit
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