FP2 Analog Unit
Specifications
14 - 17
14.5 Shared Memory of Analog Output Processing
14.5 Shared Memory of Analog Output Processing
14.5.1
Analog Output Hold Setting (CPU unit with analog I/O: address 38)
(Analog output unit: address 17)
Sets either the non-hold, hold (final value during RUN mode), or hold (any value) for the
analog output during the FP2 CPU unit PROG. mode.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Address 38
or
Address 17
H0000: Non-hold
H0001: Hold (final value during RUN mode)
H0002: Hold (any value)
(Default: H0000)
Bit position
If a value different from those above is set, then non-hold is set.
14.5.2
Analog Output Hold (any value) Data Setting (CPU unit with
analog I/O: address 39) (Analog output unit: addresses 18 to 21)
As explained above, when a desired output is set for the hold setting, the analog output
value is held corresponding to the data set at this address.
15 14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Address 39
or
Addresses 18 to 21
±
10V output range: K-2048 to K2047
0 to 20mA output range: K0 to K4095
(Default: K0000)
Bit position
At the CPU unit with analog I/O
- address 39: analog output ch0
At the analog output unit
- address 18: analog output ch 0
- address 19: analog output ch 1
- address 20: analog output ch 2
- address 21: analog output ch 3
If a value different from those above is set, then the set value becomes disabled, and the
final output value before moving to the PROG. mode is held.
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Содержание FP2 -AD8
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Страница 24: ...FP2 Analog Unit Wiring 3 2 Phone 800 894 0412 Fax 888 723 4773 Web www clrwtr com Email info clrwtr com ...
Страница 37: ...Chapter 5 Initial Settings Phone 800 894 0412 Fax 888 723 4773 Web www clrwtr com Email info clrwtr com ...
Страница 99: ...Chapter 13 Troubleshooting Phone 800 894 0412 Fax 888 723 4773 Web www clrwtr com Email info clrwtr com ...
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Страница 103: ...Chapter 14 Specifications Phone 800 894 0412 Fax 888 723 4773 Web www clrwtr com Email info clrwtr com ...
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