AFX SERIES® OPERATION MANUAL
SECTION 8:
Entire Contents Copyright
2018 by Pacific Power Source, Inc. (PPS) • All Rights Reserved • No reproduction without written authorization from PPS.
AFX Series Power Source Operation Manual
Page 388 of 485
Command Syntax
*SRE <nr1>
Description
Before reading a status register, bits must be enabled. This command
enables bits in the service request register. The current setting is
saved in non-volatile memory.
Parameters
0-255
Parameter Format
<nr1>
Example
*SRE 255
Query Format
*SRE?
Description
Reads the current state of the service request enable register. The
register is cleared after reading it. Refer to section 8.12 for register
bit values.
Returned Data Format
<nr1>
Query Example
*SRE?
255
Query Format
*STB?
Description
Status Byte Query. The *STB? query returns the contents of the
status byte register (STB). After this query, the content of the STB
register is reset. Refer to section 8.12 for register bit values.
Returned Data Format
<nr1>
Query Example
*STB?
4
Command Syntax
*TRG
Description
Triggers pending operation.
Parameters
None
Parameter Format
n/a
Command Syntax
*WAI
Description
Prohibits the instrument from executing any new commands until all
pending overlapped commands have been completed.
Parameters
None
Parameter Format
n/a
8.12
Status and Events Registers
The IEEE488.2 standard defines a standardized status and events register system. Refer to
the ANSI/IEEE-488.2 1987 standard for more information. This section provides an overview
of these registers and bit positions for various status and error events.
8.12.1
Status Byte Register (STB)
The status register content is returned on a *STB? query. It contains 8 bits as shown in the
table below. The return value represents the 8 bits positions and can range from 0-255. A
*CLS command will clear the Status Byte Register (STB) and the Event Status Register (ESR).
Refer to Figure 8-2,”Status Byte Logical Model”.
BIT
NAME
DEFINITION
Содержание AFX Series
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