CHAPTER 2: CONFIGURATION AND COMMUNICATION
B3000-B Serial Brains User’s Guide
7
Binary Mode with Checksum
This mode is
not
supported by PAC Control and Opto Control.
ASCII Mode with Checksum
This mode is
not
supported by PAC Control and Opto Control
.
Base Address
0
4
8
12
16
20
24
28
32
36
40
44
48
52
56
60
Upper Address
0
0
0
0
1
1
1
1
2
2
2
2
3
3
3
3
Lower Address
2
6
A
E
2
6
A
E
2
6
A
E
2
6
A
E
Base Address
64
68
72
76
80
84
88
92
96
100 104 108 112 116 120 124
Upper Address
4
4
4
4
5
5
5
5
6
6
6
6
7
7
7
7
Lower Address
2
6
A
E
2
6
A
E
2
6
A
E
2
6
A
E
Base Address
128 132 136 140 144 148 152 156 160 164 168 172 176 180 184 188
Upper Address
8
8
8
8
9
9
9
9
A
A
A
A
B
B
B
B
Lower Address
2
6
A
E
2
6
A
E
2
6
A
E
2
6
A
E
Base Address
192 196 200 204 208 212 216 220 224 228 232 236 240 244 248 252
Upper Address
C
C
C
C
D
D
D
D
E
E
E
E
F
F
F
F
Lower Address
2
6
A
E
2
6
A
E
2
6
A
E
2
6
A
E
Base Address
0
4
8
12
16
20
24
28
32
36
40
44
48
52
56
60
Upper Address
0
0
0
0
1
1
1
1
2
2
2
2
3
3
3
3
Lower Address
3
7
B
F
3
7
B
F
3
7
B
F
3
7
B
F
Base Address
64
68
72
76
80
84
88
92
96
100 104 108 112 116 120 124
Upper Address
4
4
4
4
5
5
5
5
6
6
6
6
7
7
7
7
Lower Address
3
7
B
F
3
7
B
F
3
7
B
F
3
7
B
F
Base Address
128 132 136 140 144 148 152 156 160 164 168 172 176 180 184 188
Upper Address
8
8
8
8
9
9
9
9
A
A
A
A
B
B
B
B
Lower Address
3
7
B
F
3
7
B
F
3
7
B
F
3
7
B
F
Base Address
192 196 200 204 208 212 216 220 224 228 232 236 240 244 248 252
Upper Address
C
C
C
C
D
D
D
D
E
E
E
E
F
F
F
F
Lower Address
3
7
B
F
3
7
B
F
3
7
B
F
3
7
B
F
Upper address switch
Lower address switch
Upper address switch
Lower address switch
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