F06S/F06T 2U System Contribution
26
107 GND
47 P3E_CPU0_PCIE3_RX_DN12
108 P3E_CPU0_PCIE3_TX_C_DP13
48 GND
109 P3E_CPU0_PCIE3_TX_C_DN13
49 GND
110 GND
50 P3E_CPU0_PCIE3_RX_DP13
111 GND
51 P3E_CPU0_PCIE3_RX_DN13
112 P3E_CPU0_PCIE3_TX_C_DP14
52 GND
113 P3E_CPU0_PCIE3_TX_C_DN14
53 GND
114 GND
54 P3E_CPU0_PCIE3_RX_DP14
115 GND
55 P3E_CPU0_PCIE3_RX_DN14
116 P3E_CPU0_PCIE3_TX_C_DP15
56 GND
117 P3E_CPU0_PCIE3_TX_C_DN15
57 GND
118 GND
58 P3E_CPU0_PCIE3_RX_DP15
119 GND
59 P3E_CPU0_PCIE3_RX_DN15
120 MEZZA_PRSNT_N
60 GND
Table 3-3 PIN definition of OCP Mezzanine connector
3.10
LAN on Motherboard (LOM)
F06 OCP motherboard's networking is powered by the Intel I210 Single 10/100/1000 integrated MAC and PHY
controller. Intel I210 requires a PCIe x1 Gen2 upstream interface. Intel I210 also requires the use of the C610 (PCH)
SMBus interface during Sleep states S5 as well as for ME Firmware. Intel I210 will be on standby power so that
Wake on LAN and manageability functions can be supported. Intel I210 will be used in conjunction with the BMC
for out of band Management traffic. The BMC will communicate with Intel I210 over a NC-SI interface (RMII
physical). Intel I210 will be on standby power so that the BMC can send management traffic over the NC-SI
interface to the network during sleep states S5.
3.11
Share-NIC (BMC management port)
BMC of motherboard is able to support Share-NIC for either direction is up to 1Mb/s when using SMBus and 100
Mb/s for the NCSI (Network Controller Sideband Interface) interface, which enables the connection of a Baseboard
Management Controller (BMC) to a set of Network Interface Controller (NICs) in server computer systems for the
purpose of enabling out-of-band remote manageability.
When working over PCIe bus, the bandwidth is limited by the PCIe bandwidth and the I210 processing capabilities.
