ON Semiconductor NCP1608BOOSTGEVB, Руководство пользователя

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NCP1608BOOSTGEVB
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24
Table 6. SUMMARY OF BOOST EQUATIONS
Components are identified in Figure 3
Input rms Current
Iac +
P
out
h @ Vac
h (the efficiency of only the PFC
stage) is generally in the range of 90
− 95%. Vac is the rms ac line input
voltage.
Inductor Peak Current
I
L(peak)
+
2
Ǹ @
2 @ P
out
h @ Vac
The maximum inductor peak current
occurs at the minimum line input
voltage and maximum output power.
Inductor Value
L v
Vac 2 @
ǒ
V
out
2
Ǹ
* Vac
Ǔ
@ h
2
Ǹ @
V
out
@ P
out
@
f
SW(MIN)
f
SW(MIN)
is the minimum desired
switching frequency. The maximum
L is calculated at both the minimum
line input voltage and maximum line
input voltage.
On Time
t
on
+
2 @ L @ P
out
h @ Vac
2
The maximum on time occurs at the
minimum line input voltage and
maximum output power.
Off Time
t
off
+
t
on
V
out
Vac @
Ť
sin q
Ť
@ 2
Ǹ *
1
The off time is a maximum at the
peak of the ac line voltage and ap-
proaches zero at the ac line zero
crossings. Theta ( q ) represents the
angle of the ac line voltage.
Switching Frequency
f
SW
+
Vac
2
@ h
2 @ L @ P
out
@
ǒ
1
*
Vac @
|sin
q
|
@ 2
Ǹ
V
out
Ǔ
On Time Capacitor
Ct w
2 @ P
out
@ L
MAX
@ I
charge
h @ Vac
LL
2
@ V
Ct(MAX)
Where Vac
LL
is the minimum line in-
put voltage and L
MAX
is the maxim-
um inductor value. I
charge
and
V
Ct(MAX)
are shown in the specifica-
tion table.
Inductor Turns to ZCD
Turns Ratio
N
B
: N
ZCD
v
V
out
*
ǒ
2
Ǹ @
Vac
HL
Ǔ
V
ZCD(ARM)
Where Vac
HL
is the maximum line
input voltage. V
ZCD(ARM)
is shown in
the specification table.
Resistor from ZCD
Winding to the ZCD pin
R
ZCD
w
2
Ǹ @
Vac
HL
I
ZCD(MAX)
@ (N
B
: N
ZCD
)
Where I
ZCD(MAX)
is maximum rated
current for the ZCD pin (10 mA).
Output Voltage and
Output Divider
V
out
+ V
REF
@
ǒ
R
out1
@
R
out2
) R
FB
R
out2
@ R
FB
) 1
Ǔ
R
out1
+
V
out
I
bias(out)
R
out2
+
R
out1
@ R
FB
R
FB
@
ǒ
V
out
V
REF
* 1
Ǔ
* R
out1
Where V
REF
is the internal refer-
ence voltage and R
FB
is the pull −
down resistor used for FPP. V
REF
and R
FB
are shown in the specifica-
tion table. I
bias(out)
is the bias cur-
rent of the output voltage divider.
Output Voltage OVP
Detection and Recovery
V
out(OVP)
+
V
OVP
V
REF
@ V
REF
@
ǒ
R
out1
@
R
out2
)
R
FB
R
out2
@ R
FB
) 1
Ǔ
V
out(OVPL)
+
ǒ
ǒ
V
OVP
V
REF
@ V
REF
Ǔ
− V
OVP(HYS)
Ǔ
@
ǒ
R
out1
@
R
out2
) R
FB
R
out2
@ R
FB
) 1
Ǔ
V
OVP
/V
REF
and V
OVP(HYS)
are
shown in the specification table.
Output Voltage Ripple and
Output Capacitor Value
C
bulk
w
P
out
2
@ p @
V
ripple(peak − peak)
@ f
line
@
V
out
V
ripple(peak − peak)
t
2
@
ǒ
V
out(OVP)
*
V
out
Ǔ
Where f
line
is the ac line frequency
and V
ripple(peak − peak)
is the peak − to −
peak output voltage ripple. Use f
line
= 47 Hz for universal input worst
case.
Output Capacitor rms
Current
I
C(RMS)
+
2
Ǹ @
32
@
P
out
2
9 @ p @ Vac @ V
out
@ h 2
* I
load(RMS)
2
Ǹ
Where I
load(RMS)
is the rms load cur-
rent.