NCP1608BOOSTGEVB
http://onsemi.com
18
The evaluation board can be configured for THD reduction or power dissipation reduction. Table 3 shows the configuration
results.
Table 3. EVALUATION BOARD CONFIGURATION RESULTS
R
CTUP
Ct
(R
CT
= 0
W
)
Shutdown Power Dissipation (V
FB
= 0 V)
(V
in
= 265 Vac 50 Hz)
Efficiency (P
out
= 100 W)
THD (P
out
= 100 W)
115 Vac
60 Hz
230 Vac
50 Hz
115 Vac
60 Hz
230 Vac
50 Hz
open
1 nF
224 mW
93.5%
95.7%
8.4%
12.5%
1.5 M
W
1.22 nF
294 mW
93.5%
95.5%
4.4%
6.2%
Safety Precautions
Since the FPP feature is only intended to protect the
system in the case of a floating FB pin, care must be taken
when removing the jumper.
Do not attach any wires to the
jumper pins with the jumper removed.
Connecting wires
to the FB pin couples excessive noise to the FB pin. This
prevents the correct operation of FPP and causes maximum
power to be delivered to the output. This can cause excessive
voltage to be applied to C
bulk
.
Always wear proper
eye
protection when the jumper is removed.
The jumper is located next to high voltage components.
Do not remove the jumper during operation with bare
fingers or non-insulated metal tools.
Layout Considerations
Careful consideration must be given to the placement of
components during layout of switching power supplies.
Noise generated by the large voltages and currents can be
coupled to the pins of the NCP1608. The following
guidelines reduce the probability of excessive coupling:
1. Place the following components as close as
possible to the NCP1608:
a. Ct capacitor
b. V
CC
decoupling capacitor
c. Control pin compensation components
2. Minimize trace length, especially for high current
loops.
3. Use wide traces for high current connections.
4. Use a single point ground connection between
power ground and signal ground.
The evaluation board includes the following unpopulated
footprints to enable user experimentation:
1. CCS to add a decoupling capacitor to the CS pin.
2. CZCD to add a decoupling capacitor to the ZCD
pin.
3. DDRV to add a diode for faster turn off of Q1.
4. DVCC to add a diode to clamp V
CC
.
5. ROUT2B to add a resistor for a more accurate
output voltage.
6. RS3 to add a resistor for a more accurate inductor
peak current limit or to reduce the heating of the
current sense resistors.
Summary
A universal input voltage 100 W converter is designed
using the boost topology. The converter is implemented with
the NCP1608. Over the input voltage range and with an
output power of 100 W, the PF, THD, and efficiency are
measured as greater than 0.97, less than 8%, and greater than
92% respectively. The converter complies with
IEC61000
−
3
−
2 Class D limits for an input power of 75 W.
The converter is stable over the input voltage range with a
measured phase margin greater than 50 degrees. Finally, the
overvoltage protection and floating pin protection features
protect the converter from excessive output voltage.
The evaluation board is designed to showcase the features
and flexibility of the NCP1608. This design is a guideline
only and does not guarantee performance for any
manufacturing or production purposes.
