2.4.1 Interrupt Block Diagram of OME-PIO-
D56/D24
INT_CHAN_0
INT_CHAN_1
INT_CHAN_2
INT_CHAN_3
INT\
Level_trigger
initial_low
active_high
The interrupt output signal of OME-PIO-D56/OME-PIO-D24, INT\ is
Level_trigger & Active_Low
. If the INT\ generates a low pulse, the OME-PIO-
D56/OME-PIO-D24 will interrupt the PC only once. If the INT\ is fixed in low level,
the OME-PIO-D56/OME-PIO-D24 will interrupt the PC continuously.
INT_CHAN_0/1/2/3 must be controlled in a pulse type signals. It must be fixed in
low level state normally and generate a high pulse to interrupt the PC
.
The priority of INT_CHAN_0/1/2/3 is the same. If all these four signals are active
at the same time, then INT\ will be active only one time. So the interrupt service
routine has to read the status of all interrupt channels for a multi-channel interrupt.
Refer to Sec. 2.4 for mare information.
DEMO5.C
→
for multi-channel interrupt source
If only one interrupt source is used, the interrupt service routine does not have to read
the status of interrupt source. The demo programs DEMO3.C and DEMO4.C are
designed for single-channel interrupt demo, as follows:
DEMO3.C
→
for INT_CHAN_0 only (PC0 initial low)
DEMO4.C
→
for INT_CHAN_0 only (PC0 initial high)
OME-
PIO-D56/PIO-D24 User Manual (Ver.2.1, Oct/2003, PPH-005-21) ---- 12
