42114101 Rev.1
17 /
A/D bus
MPU
LSI
NBSY
ACK
NSTB
RXD-N
P16
NRXD
Receive Data
CN1
BUSY
ACK-N
STROBE-N
Receive Data
1 to 8
STROBE-N
BUSY
ACK-N
RXD-N
2~8
µ
s
500ns max.
2.1.4 Interface Control
(1)
Parallel Interface
The parallel data input from the host to the interfaced LSI is latched to its internal register
at the falling edge of the STROBE-N signal.
At the same time, the LSI sets the BUSY signal to the high level to inform the host that
the data is being processed, and outputs the RXD signal to inform the MPU of data
reception. The data is read upon receiving the RD-N signal from the MPU.
When the data processing ends, the BUSY signal is set to off and the ACK-N signal in
sent to request the next data. When reception is impossible because the buffer is full, the
BUSY signal is sent to request stopping of data transmission.
* The STROBE-based timing for the BUSY signal is adjustable from the Maintenance
menu.
ACK signal timing and BUSY signal timing can be adjusted from the Maintenance menu.
Содержание ML490 Series
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Страница 48: ...42114101 Rev 1 48 Change arm Change lever Platen Release cam Figure 2 13 REAR TOP BOTTOM...
Страница 96: ...42114101 Rev 1 96 9 Carriage Assy NK2 10 SUS Bearing portion of guide roller EM 30L B...
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Страница 126: ...42114101 Rev 1 126 Figure B 5 Option Spare Parts Pull Tractor Bottom Tractor I F Board 3 2 1 4 5 6 7...
