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UM10741

All information provided in this document is subject to legal disclaimers.

User manual

Rev. 1 — 1 April 2014

18 of 61

NXP Semiconductors

UM10741

Fm+ development kit OM13320

During programming or at other times it may be necessary to reset the MCU, by briefly
shorting JP4 (see

Figure 15

Remark:

An MCU Reset is not the same as an I

C Bus Reset. Resetting the MCU will not

affect the I

C-bus, unless the MCU firmware is designed to issue an I

C Bus Reset when

it is reset.

MCU Port0 and Port1 provide most of the signals used by the Fm+ Development Board
(OM13260), see

Figure 16

and

Figure 17

. I

C Bus1 is connected to the MCU Port0 via

RC edge rate control networks that provide bus fall time control (SCL1: R42 and C18;
SDA1: R43 and C17).

Fig 14. MCU SWD interface

Fig 15. MCU SWD interface section

aaa-011874

R38
10 kΩ

JP4-1

LPC SWD PROG CONNECTOR

R37
100 kΩ

JP4-2

RST

GND

+3V3

GND

MCU_SCLK

SWDIO

SWD_RESET

CN19-10

CN19-9

CN19-8

CN19-7

CN19-6

CN19-5

CN19-4

CN19-3

CN19-2

CN19-1

Содержание UM10741

Страница 1: ... development kit OM13320 Rev 1 1 April 2014 User manual Document information Info Content Keywords I2C bus Fm development tool PCA9672 PCA9955 Abstract User manual for the Fm development board OM13260 kit OM13320 ...

Страница 2: ...User manual Rev 1 1 April 2014 2 of 61 Contact information For more information please visit http www nxp com For sales office addresses please send an email to salesaddresses nxp com NXP Semiconductors UM10741 Fm development kit OM13320 Revision history Rev Date Description 1 0 20140401 User manual initial release ...

Страница 3: ...tem In some uses the GUI is not required and the Fm Development Kit OM13320 can be run as a standalone demonstration requiring only an external power adapter not included 2 Key features I2C bus masters Self contained PCB with two independent I2C buses Bus 1 On card I2C MCU master NXP LPC1343 Bus 2 NXP LPC Xpresso MCU module not included and NXP PCA9665 bus controller USB interface to on card MCU f...

Страница 4: ... probe Utility LEDs buffered to monitor signals by user jumper wire connection External DC input 6 V DC maximum Prototype area Uncommitted 8 8 100 mil pitch tie points for end user component attachment Test points and ground for probe attachment to major signals Connection of both I2C buses together supplied 2 wire jumper 3 Fm development kit quick tour 3 1 Kit contents Before using the kit for th...

Страница 5: ...ding upon the desired use some of the PCB assemblies may be attached to each other either by plug connection or by stacking the GPIO PCB assemblies above the Fm Development Board OM13260 using the supplied ribbon cables and hardware Table 1 Fm development kit contents Components Fm development board OM13260 GPIO target board OM13303 PCA9617A bus buffer demo board OM13398 Bridge board OM13399 Cable...

Страница 6: ...gure 2 contains two separate I2C bus structures together with supporting circuitry Each bus has a bus master one or more bus slaves and user options to change the bus voltage and bus pull up resistors Adjusting these changes the operation of the buses to suit various goals In addition the two buses may be linked together to operate a one I2C bus structure This can be done with a two wire jumper su...

Страница 7: ...ot supplied in the kit require the GPIO Target Board OM13303 Each one has eight channels of LED indicator and push button switches for user input See Figure 3 3 2 3 PCA9617A bus buffer demo board OM13398 Bus buffers bridge two I2C bus segments which are provided on the Fm Development Board OM13260 by Bus1 and Bus2 Bus buffer daughter cards such as the PCA9617A Bus Buffer Demo Board OM13398 supplie...

Страница 8: ...ese with the Fm Development Kit requires the Bridge Board OM13399 supplied in the kit See Figure 5 3 2 5 Daughter cards not supplied in the kit These are not in the OM13230 kit and should be obtained separately Daughter cards hedge against obsolescence so that the Fm Development Kit OM13320 can be used with future devices by adding newly released daughter cards as they become available An example ...

Страница 9: ...e on the computer to be used with the kit see Section 4 7 4 2 First time setup of the Fm development board OM13260 Several jumpers must be installed before using the Fm Development Board OM13260 PCB The on board microcontroller MCU must contain the appropriate firmware To install the firmware requires the connection to a Personal Computer PC running Microsoft Windows 7 64 Operating System and a US...

Страница 10: ...ntended operation of the Fm Development Board OM13260 Port E CN12 should be left open or linked with a jumper wire or for the attachment of a Bus Buffer Board The PCA9617A Bus Buffer Demo Board OM13398 is supplied in the kit For the purpose of this quick setup section install the two wire jumper supplied as shown in Figure 8 Remark The two wire jumper requires a twist as shown The diagonally oppos...

Страница 11: ...Fm development kit OM13320 4 5 OM13260 mounting hardware To prevent damage to the table surface it is recommended that metal hardware supplied in the kit is installed in the four mounting holes This raises the PCB assembly about 6 mm See Figure 9 Remark Save the completed Fm Development Board now install the NXP USB Driver Fig 8 OM13260 Port E jumper Fig 9 OM13260 mounting hardware ...

Страница 12: ... RST JP4 jumper to reset the MCU 6 The MCU will enumerate on the PC as a disk drive called CRP_DISABLD 7 Delete the file on the MCU size may vary up to 32 kB 8 Copy the new firmware file NXP_Fm_Eval_Board_V1_0 bin extracted from the zip file to the MCU 9 Remove the ISP JP6 jumper 10 Install and then remove RST JP4 jumper to reset the MCU 4 7 NXP GUI installation A Graphical User Interface GUI is p...

Страница 13: ... the Port E connector CN12 The signals from both buses are available simultaneously at each of four connectors Port A through Port D CN1 through CN4 respectively These are intended for attachment of accessory daughter cards which will be made available as future I2C bus devices are released The size of the pull up resistors can be changed by moving shorting jumpers JP1 JP2 JP11 and JP12 providing ...

Страница 14: ...seldom 5 V due to cable losses plus an additional drop in a series connected diode used to OR the two inputs Whichever has the highest voltage has priority A shunt Zener diode 6 2 V protects the board from reverse polarity and overvoltage at the DC Power connector CN6 To aid in understanding digital signal levels on the board two logic probe circuits are provided These are buffered LEDs Green D6 a...

Страница 15: ...be downloaded if required The following pages are divided in to several sections covering the power supply USB interface Bus1 Bus2 and support circuits 5 2 1 Power supply The Fm Development Board OM13260 operates from DC either from the USB Host connector CN5 or an optional external AC DC power adapter not supplied in the kit via connector CN6 See Figure 11 and Figure 12 Selection of the power sou...

Страница 16: ... R2 10 kΩ R1 10 kΩ USB_V GND R4 10 kΩ R3 10 kΩ MCU_VBUS GND D2 STPS2L40U GND C2 100 pF 10 V 5V R5 820 Ω D4 LTST C170KGKT GRN 5 V 5 HS1 PCBPAD 6 7 4 8 9 10 1 2 3 HS1 HS6 HS5 HS4 ADVTAB HS3 HS2 IN OUT GND IC1 ZLDO1117G33TA C1 100 pF 10 V 3V3 R6 820 Ω D5 LTST C170KGKT GRN 3 3 V GND 3V3 REGULATOR R40 20 kΩ R390 10 kΩ EXT_V GND D1 STPS2L40U Max input 6 2 V DC GND GND EXT POWER D3 1SMB5920BT3 6V2 CN6 DD...

Страница 17: ...nk at about one per second 5 3 Bus one Bus1 There are two almost identical I2C buses on the Fm Development Board OM13260 called Bus1 and Bus2 These share a ground and power connection but may be operated independently Remark The bus voltage for each I2C may be different for example 3 3 V for one I2C bus 5 V for the other I2C bus 5 3 1 Bus1 master MCU LPC1343 Microcontroller MCU LPC1343 IC5 serves ...

Страница 18: ...not affect the I2C bus unless the MCU firmware is designed to issue an I2C Bus Reset when it is reset MCU Port0 and Port1 provide most of the signals used by the Fm Development Board OM13260 see Figure 16 and Figure 17 I2C Bus1 is connected to the MCU Port0 via RC edge rate control networks that provide bus fall time control SCL1 R42 and C18 SDA1 R43 and C17 Fig 14 MCU SWD interface Fig 15 MCU SWD...

Страница 19: ...D C17 10 pF GND C18 10 pF SCL1 SDA1 3V3 R33 10 kΩ 100 Ω 100 Ω R43 R42 GND JP6 1 JP6 2 ISP RESET PIO0_0 PIO0_1 CLKOUT CT32B0_MAT2 USB_TOGGLE PIO0_2 SSP_SSEL CT16B0_CAP0 PIO0_3 USB_VBUS PIO0_4 I2C_SCL PIO0_5 I2C_SDA PIO0_6 USB_CONNECT SCK PIO0_7 CTS PIO0_8 SSP_MISO CT16B0_MAT0 PIO0_9 SSP_MOSI CT16B0_MAT1 SWD SWCLK PIO0_10 SSP_CLK CT16B0_MAT2 R PIO0_11 ADC0 CT32B0_MAT3 aaa 011876 LPC134X_HVQFN32 IC5G...

Страница 20: ...SDA signal lines Bus2 has a similar arrangement See Figure 19 and Figure 20 Fig 18 IC5 MCU Port1 oscillator and power supply aaa 011877 LPC134X_HVQFN32 IC5G 7 41 40 39 38 37 36 35 34 33 GND9 GND8 GND7 GND6 GND5 GND4 GND3 GND2 GND1 GND 6 29 VDDIO_EXT_1 VDDMAIN_EXT IC5G 6 LPC134X_HVQFN32 GND C9 100 nF GND C6 100 nF 3V3 4 5 XTALIN XTALOUT IC5G 5 LPC134X_HVQFN32 GND C7 15 pF NX5032GA GND C8 15 pF 12 M...

Страница 21: ...further power dissipation in the 3 3 V linear regulator IC1 The sixteen channels drive eight LED clusters consisting of four White LEDs LED12 LED15 and four RGB LED clusters LED0 LED11 The maximum current available for each channel is set by R35 and the variable resistor R36 The LEDs use the PCB top metal for heat dissipation the LED driver is in the HTSSOP28 package has a thermal pad ground conne...

Страница 22: ... 1 A Fig 21 Bus1 LED driver 16 channel 38 37 36 35 34 33 32 31 30 29 GND10 GND9 GND8 GND7 GND6 GND5 GND4 GND3 GND2 GND1 GND IC6G 2 PCA9955PW aaa 011879 GND C5 22 pF 16 V 3V3 R35 820 Ω PCA9955 Address 0xC0h or 0xD0h GND JP5 1 JP5 2 JP5 3 Iset GND R36 10 kΩ GND LED MAX BRT 1 2 3 4 5 6 7 8 9 10 REXT A0 A1 A2 OE A3 LED0 LED1 LED2 LED3 VSS LED0 LED1 LED2 LED3 11 12 13 14 LED4 LED5 LED6 LED7 LED4 LED5 L...

Страница 23: ...ve PCA9672 The GPIO PCA9672 IC10 is connected to Bus1 and provides eight input output channels at CN10 Jumper JP10 sets the device address to one of four options depending on whether the A0 pin is connected to GND VCC SCL or SDA Bus2 has a similar arrangement for a second GPIO PCA9672 IC20 See Figure 24 and Figure 25 Remark The PCB is marked with hexadecimal 8 bit address data but data sheets and ...

Страница 24: ...NT RESET SCL SDA 15 14 13 3 2 1 VDD 16 GND 8 INT RESET SCL1 SDA1 3V3 JP10 1 JP10 3 JP10 5 JP10 7 SCL1 SDA1 3V3 IC10 PCA9672PW PCA9672 addresses VDD 0x46h SDA1 0x56h SCL1 0x54h GND 0x44h GPIO1_ 0 7 GPIO1_2 GPIO1_1 GPIO1_0 GPIO1_4 GPIO1_3 GPIO1_6 GPIO1_5 GPIO1_7 CN10 5 CN10 4 CN10 3 CN10 7 CN10 6 CN10 9 CN10 8 CN10 10 CN10 2 CN10 1 GND 3V3 Table 5 LED driver address selection A0 connected to Hexadec...

Страница 25: ... Module contains an NXP LPC1343 MCU similar to the one on Bus 1 and support circuits called LPC Link See Figure 26 The LPC Xpresso requires firmware that is loaded through either the LPC Link and USB Bridge or JTAG Single Wire Debug SWD connector Remark The LPC Xpresso is not compatible with the NXP GUI and requires the installation of an IDE for code development The LPC Link may be powered from t...

Страница 26: ...DA2A SCL2A A0 A1 RESET INT LPCXPRESSO SOCKET CN14 1 CN14 2 CN14 3 CN14 4 CN14 5 CN14 6 CN14 7 CN14 8 CN14 9 CN14 10 CN14 11 CN14 12 CN14 13 CN14 14 CN14 15 CN14 16 CN14 17 CN14 18 CN14 19 CN14 20 CN14 21 CN14 22 CN14 23 CN14 24 CN14 25 CN14 26 CN14 27 JP1 2 XPRESSO PWR JP1 1 3V3 GND D6 D7 D4 D5 D3 CN13 1 CN13 2 CN13 3 CN13 4 CN13 5 CN13 6 CN13 7 CN13 8 CN13 9 CN13 10 CN13 11 CN13 12 CN13 13 CN13 1...

Страница 27: ... side is connected via RC edge rate control networks that provide bus fall time control SCL2 R47 and C21 SDA2 R46 and C22 See Figure 29 and Figure 30 Note IC4 is physically underneath the LPC Xpresso module Fig 29 Bus2 master PCA9665 Fig 30 Bus2 master PCA9665 section aaa 011880 GND C21 10 pF GND C22 10 pF SDA2 SCL2 100 Ω 100 Ω R47 R46 TF EDGE RATE CONTROL 3V3 GND C11 100 nF PIN20 PIN19 PIN18 SDA2...

Страница 28: ...ded by jumper selection JP21 and JP22 The values of the pull up resistors are shown in Table 6 Separate pull ups are provided for the SCL and SDA signal lines See Figure 31 and Figure 32 Bus1 has a similar arrangement see Section 5 3 2 Fig 31 Bus2 pull ups and bus voltage selector Fig 32 Bus2 pull ups section aaa 011881 I2C BUS 2 PULL UP RESISTOR NETWORK GND C10 100 nF JP23 3 JP23 2 JP23 1 3V3 5V ...

Страница 29: ...Cards have jumpers to select whether connection to Bus1 or Bus2 is required Port A is shown in Figure 33 Port B Port D are identical and effectively in parallel Table 6 Bus pull up resistors Strength Position Value Bus1 SCL Bus1 SDA Bus2 SCL Bus2 SDA LOW A 1 1 kΩ R16 R13 R26 R23 MID B 634 Ω R15 R12 R25 R22 HIGH C 324 Ω R14 R11 R24 R21 Fig 33 Port A Fig 34 Daughter card connectors Port A and Port B...

Страница 30: ...pplied in the kit is an example The Fm Development Board OM13260 may also be operated with nothing connected to Port E CN12 The Port E signal pins are arranged to be symmetrical permitting the card to be rotated 180 effectively changing the direction of the signals through the card See Figure 35 and Figure 36 Remark When linked together by wire jumper the pull up resistors on each bus are effectiv...

Страница 31: ...7 Bus2 has a similar and independent connection at CN18 See Figure 37 Figure 38 and Figure 39 Remark Refer to Section 9 Third party tools of this user manual Fig 36 Port E with bus buffer card OM13398 installed Fig 37 Bus1 and Bus2 tester connectors aaa 012043 JP7 1 JP7 2 JP7 3 SSN0 SSN1 BUS2 TEST BUS1 TEST D21 GRN CN18 10 GND CN18 9 CN18 8 MOSI CN18 7 SCLK CN18 6 3V3_1 CN18 5 MISO CN18 4 CN18 3 S...

Страница 32: ...IA232 standards compliant using IC2 a voltage level translator See Figure 40 This is provided for connection to I2C Bridge devices that require Serial Communications To save space on the PCB a small mini DIN connector CN7 replaces the standard 9 pin DE shell connector For connection to standard serial comms cables an adapter is required see Figure 41 The recommended Mini DIN to DE 9 Adapter is Dig...

Страница 33: ...UM10741 Fm development kit OM13320 Fig 40 Bus2 tester connectors Fig 41 Serial Com section Fig 42 Serial Com dongle aaa 012044 3V3 GND C14 100 nF 3 GND 8 10 VDD R1IN INVALID ICL3221CVZ IC2 C1 C1 C2 C2 T1IN R1OUT EN FORCEOFF 2 4 5 6 11 9 1 16 SERIAL COMMS FORCEON 12 3V3 RXD TXD 100 nF C12 100 nF C13 15 7 V V GND C15 100 nF 13 T1OUT GND 14 GND 1 2 3 4 5 6 CN7 MINI DIN6PTH GND ...

Страница 34: ...tively See Figure 43 Figure 44 and Figure 45 Also refer to Section 9 of this user manual for details on using the tester connector for third party tools with the SPI ports Fig 43 SPI connectors Fig 44 SPI 2 Bus1 MCU connector Fig 45 SPI 0 and SPI 1 Bus2 LPC Xpresso connectors aaa 012046 CN9 8 CN9 7 CN9 6 SSN0 CN9 5 RESET CN9 4 SCLK CN9 3 MOSI CN9 2 CN9 1 MISO GND 3V3 INT SPI 0 SPI DAUGHTER CARD EX...

Страница 35: ...Q2 when CN11 1 is at or near ground When CN11 1 is open or logic 1 the FET is non conducting and the LED is off Red LED D7 is driven by FET Q3 when CN11 4 is at or near ground When CN11 4 is open or logic 1 the FET is non conducting and the LED is off See Figure 47 Note that the threshold voltage Vth of the FET is 2 5 V to 4 5 V to ensure it operates correctly on both 3 3 V and 5 V logic levels Th...

Страница 36: ...cted to the Master MCU IC5 on Bus1 the Master Bus Controller IC4 and the LPC Xpresso module See Figure 48 and Figure 49 Additional buffered LEDs are provided D19 RST and D20 Interrupt on the Fm Development Board OM13260 for visual indication These buffered LEDs operate in the same fashion as the logic probe see Section 5 10 Logic probe Fig 47 Logic probe section shown monitoring two GPIO channels ...

Страница 37: ...ired to for an application beyond the intended scope of the Fm Development Board OM13260 For example using different value pull up resistors than those supplied or other circuit experiments The prototype area is available and consists of pads and holes on a 100 mil 2 54 mm grid Power for these components is made available at several connector points CN15 is ground CN21 is 3 3 V and CN22 is 5 V See...

Страница 38: ...4 All rights reserved User manual Rev 1 1 April 2014 38 of 61 NXP Semiconductors UM10741 Fm development kit OM13320 Fig 50 Prototype area circuit Fig 51 Prototype area section aaa 012049 UTILITY POWER 5V CN22 4 CN22 2 CN22 3 CN22 1 3V3 CN21 4 CN21 2 CN21 3 CN21 1 CN15 4 CN15 2 CN15 3 CN15 1 GND ...

Страница 39: ...s product portfolio Remark The PCA9901 will be made obsolete and will not be present on future versions of the Fm Development Board OM13260 Refer to the PCA9901 data sheet for details of this device Note that it is not connected to either I2C Bus on the Fm Development Board OM13260 It is connected to the LPC Xpresso module PIO_0 7 and that module must be present and programmed to drive the PCA9901...

Страница 40: ...gic one of the supply voltage These values correspond to the I2C bus logic threshold voltages for the I2C bus specification When a push button is pressed a logic zero is applied the channel which can be read by the GPIO device to which the GPIO Target Board is attached A 2 5 header is used to connect to the Fm Development Board OM13260 or a GPIO daughter card with a flat ribbon cable supplied in t...

Страница 41: ...plies positive feedback hysteresis about 150 mV to the comparator shifting the trip point to a slightly lower voltage to stop the circuit from oscillation around the switch point The input IO0 is attenuated slightly by a resistor divider R07 and R08 if the resulting voltage is lower than the threshold set by VIL the output of the comparator IC1B switches to near ground This turns on the red LED D0...

Страница 42: ...to legal disclaimers NXP B V 2014 All rights reserved User manual Rev 1 1 April 2014 42 of 61 NXP Semiconductors UM10741 Fm development kit OM13320 Fig 57 Input ramp yellow trace green LED drive green trace Fig 58 Input ramp yellow trace red LED drive green trace ...

Страница 43: ... circuit Each channel requires three reference voltages VL VC and VH from the bias circuit A resistor divider chain R01 R02 R03 and R04 divides the supply voltage to produce one third VL one half VC and two thirds VH Each value is buffered by an op amp sections of IC80 Test points are provided as PCB pads for VH high VC center and VL low The fourth section of the quad op amp IC80 is not used Noise...

Страница 44: ...Board to allow connection without blocking the push switches or the LEDs See Figure 61 Figure 62 and Figure 63 Fig 60 Bias circuit 3V3 aaa 012140 14 IC80D LMV324MZ 5 1 kΩ R82 13 12 VH GND C89 100 nF VH TP3 7 IC80B LMV324MZ 6 5 VC GND C90 100 nF VC TP4 1 IC80A LMV324MZ 2 3 VL GND C91 100 nF VL TP2 8 IC80C LMV324MZ 9 10 10 kΩ R81 GND C87 4 7 μF 6 3 V GND C86 4 7 μF 6 3 V 5 1 kΩ R83 10 kΩ R84 GND VL ...

Страница 45: ...s NXP B V 2014 All rights reserved User manual Rev 1 1 April 2014 45 of 61 NXP Semiconductors UM10741 Fm development kit OM13320 Fig 62 Ribbon cables attached to underside of the GPIO target board OM13303 Fig 63 Ribbon cables attached to the topside of the GPIO target board OM13303 ...

Страница 46: ...buffer demo board OM13398 The Bus Buffer Board OM13398 supplied in the kit provides a method to link both the I2C buses on the Fm Development Board OM13260 by attachment to Port E in place of the wire jumper used earlier see Section 5 6 1 Linking both buses together with a jumper See Figure 64 and Figure 65 Fig 64 Bus buffer board OM13398 Fig 65 Bus buffer board OM13398 attached to the Fm developm...

Страница 47: ...o device power supplies To demonstrate the voltage level translator ability the link between the two bus buffers is supplied from a variable voltage regulator which in turn can be set by the user anywhere between 1 0 V and 3 2 V The pull up resistor on the Low Voltage Bus section is selected by jumpers 7 2 Circuit description The schematic diagram has multiple sheets For clarification only fragmen...

Страница 48: ... voltage or A Side of the second PCA9617A IC3 Loading capacitors C31 for SCL and C51 SDA can be placed on the low voltage section of the bus To accommodate two different footprints IC1 TSSOP8 and IC2 HWSON8 are connected in parallel but only one part is installed Installing JP4 disables the Bus Buffer See Figure 67 Fig 67 Bus1 bus buffer aaa 012143 3 0 kΩ R53 VDD A 524 Ω R52 240 Ω R51 GND C52 100 ...

Страница 49: ...68 I2C bus signals from the high voltage or B side of IC3 PCA9617A are passed back to the Fm Development Board OM13260 The required pull up resistors on this section of Bus1 are on the Fm Development Board OM13260 Fig 68 Bus2 bus buffer aaa 012144 3 2 SCLA SDAA 5 JP6 1 JP6 2 GND ENABLE C4 100 nF C3 100 nF GND GND PCA9617ADP IC3 VDD B VDD A 1 8 SDAA SCLA EN VDD A VDD B GND 4 TSSOP8 SDAB SCLB GND 6 ...

Страница 50: ...2 4 Variable voltage regulator The low voltage bus bias is generated by an LDO Low Drop Out voltage regulator IC5 The output voltage is set by resistor divider R3 R4 and R5 and provides a range of 1 0 V to 3 2 V The LDO provides a Power Good signal which is pulled HIGH by R6 and buffered by Q1 When the LDO is working correctly the blue LED D2 is turned ON See Figure 69 Fig 69 Supply select jumpers...

Страница 51: ...m Development Board OM13260 to flow in the opposite direction For example from Bus1 to Bus2 or from Bus2 to Bus1 when the Bus Buffer Board OM13398 is rotated in the Port E connector See Figure 71 The ability to reverse the signal flow is necessary when examining different I2C buffers or comparing one NXP device to a non NXP device Fig 70 Bus buffer board connector Fig 71 Fm development board Port ...

Страница 52: ...Bridge board OM13399 The Bridge Board OM13399 supplied in the kit provides attachment of old style with a 9 pin in line non polarized connector NXP designed I2C demo boards to the Fm Development Board OM13260 The Bridge Board OM13399 can attach to any daughter card Port A D inclusive See Figure 72 and Figure 73 Fig 72 Bridge board OM13399 attached to the Fm development board OM13260 Fig 73 Bridge ...

Страница 53: ...2C Buses Bus1 and Bus2 signals One or other I2C Bus can be selected by jumpers The power source may also be selected by jumper 8 2 Circuit description The schematic diagram has a single sheet For clarification only fragments of the schematic are shown here The full schematic should be downloaded if required The circuit is simple 8 2 1 Fm development board OM13260 connector CN3 The connector on the...

Страница 54: ...s either 3 3 V or 5 V as needed Remark When the Bridge Board OM13399 is not attached to the Fm Development Board and powered by the Tester the only option is 5 V 8 2 3 9 position connectors CN1 and CN2 Two 9 position connectors are provided both carry exactly the same signals CN1 is female CN2 is male Remark These connectors are not polarized or keyed Take care to make connection correctly Fig 75 ...

Страница 55: ...Board Bus1 or Bus2 Take care to avoid double termination of the I2C buses 8 2 5 LED indicators and pull ups Two LEDs provide indication of power D1 Green and INT interrupt status D2 Red To prevent malfunction of the I2C bus if the Bridge Board OM13399 is used in manner that does not have pull up on either SCL or SDA there are weak pull ups R3 R4 These may be replaced with lower value resistors or ...

Страница 56: ... 56 of 61 NXP Semiconductors UM10741 Fm development kit OM13320 8 3 Example using PCA9632 OM13269 The Bridge Board OM13399 supplied in the kit provides attachment of old style with a 9 pin in line non polarized connector NXP designed I2C demo boards to the Fm Development Board OM13260 Fig 79 Bridge board OM13399 used to attach a PCA9632 OM13269 ...

Страница 57: ...es a range of tools driven from USB and outputs to I2C and SPI The user interface is very similar to the Fm Development Board GUI and a DLL is provided for custom development These tools are not supplied in the kit and must be purchased directly from the vendor Total Phase supplies two tools called Aardvark host adapter and Beagle bus logger that connect directly to the Fm Development Board OM1326...

Страница 58: ...s document is subject to legal disclaimers NXP B V 2014 All rights reserved User manual Rev 1 1 April 2014 58 of 61 NXP Semiconductors UM10741 Fm development kit OM13320 Fig 82 Beagle Bus Logger connected to the Fm development board OM13260 ...

Страница 59: ...reviations Acronym Description DLL Dynamic Link Library EVM Evaluation Module FET Field Effect Transistor Fm Fast mode Plus GPIO General Purpose Input Output GUI Graphical User Interface HID Human Interface Driver I2C bus Inter Integrated Circuit bus I O Input Output ISP In System Programmable JTAG Joint Test Action Group LDO Low Drop Out LED Light Emitting Diode MCU MicroController Unit OS Operat...

Страница 60: ...roducts and NXP Semiconductors accepts no liability for any assistance with applications or customer product design It is customer s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer s applications and products planned as well as for the planned application and use of customer s third party customer s Customers should provide appropriate d...

Страница 61: ...ster MCU LPC1343 17 5 3 2 Bus1 pull up resistors 20 5 3 3 LED driver slave PCA9955 21 5 3 4 GPIO slave PCA9672 23 5 4 Bus two Bus2 25 5 4 1 Bus2 master LPC Xpresso MCU LPC1343 25 5 4 2 Bus2 bus master PCA9665 27 5 4 3 Bus2 pull up resistors 28 5 5 Daughter card ports 29 5 6 Port E 30 5 6 1 Linking both buses together with a jumper 30 5 6 2 Linking both buses together with a bus buffer board 31 5 7...

Страница 62: ...Mouser Electronics Authorized Distributor Click to View Pricing Inventory Delivery Lifecycle Information NXP OM13320 598 ...

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