NXP Semiconductors QorIQ FRDM-LS1012A, Справочное руководство, Страница: 18 / 31

2.5 Double data rate (DDR) memory
The FRDM-LS1012A supports One 512 MB DDR3L SDRAM memory, running at data
rates up to 1000 MT/s. The part number is Micron MT41K256M16TW-107:P.
Following are the characteristics of the LS1012A DDR3L memory controller:
• Up to 1.0 GT/s
• Supports 16-bit operation (no ECC support)
• Support for x8, x16 devices
• Supports 1 chip select, D1_MCS_B
The VR5100 VREF LDO (U8) takes 1.35 V supply and provides 0.675 V VREF supply
to the DDR3L memory.
The memory interface includes all the necessary termination and I/O power, and is routed
so as to achieve maximum performance of the memory bus.
2.6 Serializer/deserializer (SerDes)
The FRDM-LS1012A SerDes block provides two high-speed serial communication lane,
supporting SGMII PHYs. See QorIQ LS1012A Data Sheet for details about the SerDes
protocols supported on the LS1012A processor. The following table lists the components
used to support the different SerDes options.
Table 2-7. FRDM-LS1012A SerDes embedded devices
Manufacturer Part number Description Lane supported Speed
Realtek RTL8211FS-CG • SGMII 1G PHY x1 1.25 Gbit/s
Realtek RTL8211FS-CG • SGMII 1G PHY x1 1.25 Gbit/s
2.7 Ethernet controller
The LS1012A processor supports two Ethernet MACs, which connect to the onboard
PHYs using the SGMII protocols.
2.7.1 SGMII ports
Double data rate (DDR) memory
QorIQ FRDM-LS1012A Board Reference Manual, Rev. 3, 12/2016
18 NXP Semiconductors