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NXP Semiconductors OM13260 Скачать руководство пользователя страница 51

NXP Semiconductors

UMxxxxx

Install Guide

All information provided in this document is subject to legal disclaimers.

Preliminary 1

— September 6, 2013

© NXP B.V. 2013. All rights reserved.

51 of 70

Fig 6.6 Push switches

6.2.3 Bias Circuit

Each channel requires three reference voltages (VL, VC, and VH), from the Bias Circuit. A resistor
divider chain (R01, R02, R03, and R04) divides the supply voltage to produce one-third (VL), one half
(VC) and two-thirds (VH). Each value is buffered by an op amp (sections of IC80). Test points are
provided as PCB pads for VH (high), VC (center), and VL (low). The fourth section of the quad op amp
(IC80) is not used. Noise spikes on each bias supply are removed by capacitors (C89, C90, and C91),
power supply variations are removed by capacitors (C86 and C87). See figure 6.7.

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Содержание OM13260

Страница 1: ...stallation Guide Installation Guide for OM13320 Preliminary 1 9 6 2013 Installation Guide Document information Info Content Keywords Abstract Installation Guide for the Fm Development Board OM13260 Ki...

Страница 2: ...mers Preliminary 1 September 6 2013 NXP B V 2013 All rights reserved 2 of 70 Revision history Rev Date Description Preliminary 1 Sept 5 2013 First Draft of document Contact information For more inform...

Страница 3: ...on Bus1 and Bus2 LED driver with 16 constant current outputs PCA9955 with four RGB and four White LEDs on Bus1 Accessory Sockets Connectors for up to four daughter cards each providing power Bus1 and...

Страница 4: ...es two different firmware programs see table 3 1 Table 3 1 Supplied Firmware FM DevelopmentBoard V03_00 bin 19kb Standalone_trade_show_FM _DEMO bin 7kb The Trade Show mode activates the LEDs on the Fm...

Страница 5: ...be attached to each other either by plug connection or by stacking the GPIO PCB assemblies above the Fm Development Board OM13260 using the supplied ribbon cables and hardware 3 3 Supplied Printed Cir...

Страница 6: ...en using GPIO Daughter Cards not supplied in the kit require the GPIO Target Board OM13303 Each one has eight channels of LED indicator and pushbutton switches for user input See figure 3 4 Fig 3 4 OM...

Страница 7: ...r with nine pins To use these with the Fm Development Kit requires the Bridge Board OM13399 supplied in the kit See figure 3 6 Fig 3 6 OM13399 Bridge Board PCB Assembly 3 3 5 Daughter Cards not suppli...

Страница 8: ...aughter Card is not available for a specific new device it can still be added to the Fm Development Board OM13260 using the EVM Evaluation Module OM13490 See figure 3 8 and figure 3 9 Sample devices a...

Страница 9: ...7 4 Install the NXP GUI Software on the computer to be used with the kit see section 4 8 There are two distinct operating modes each requires different firmware on the Fm Development Board OM13260 It...

Страница 10: ...rved 10 of 70 Table 4 1 OM13260 Jumpers Jumper Label Function First Time JP1 XPRESSO POWER Close JP2 HDD Open JP3 CONNECT Close JP4 RST Open JP5 PCA9955 Address GND JP6 ISP Open JP7 SPI SEL 1 JP10 PCA...

Страница 11: ...g up the intended operation of the Fm Development Board OM13260 Port E CN12 should be left open or linked with a jumper wire or for the attachment of a Bus Buffer Board The PCA9617A Bus Buffer Demo Bo...

Страница 12: ...oard now install the NXP USB Driver 4 6 NXP USB Driver Installation The Win7 64 OS Operating System will attempt to auto install a driver when the Fm Development Board is attached by USB for the first...

Страница 13: ...x Install Guide All information provided in this document is subject to legal disclaimers Preliminary 1 September 6 2013 NXP B V 2013 All rights reserved 13 of 70 Fig 4 5 Windows Device Manager Fig 4...

Страница 14: ...tion provided in this document is subject to legal disclaimers Preliminary 1 September 6 2013 NXP B V 2013 All rights reserved 14 of 70 Fig 4 7 Windows dialog box Fig 4 8 Windows dialog box C Program...

Страница 15: ...ide All information provided in this document is subject to legal disclaimers Preliminary 1 September 6 2013 NXP B V 2013 All rights reserved 15 of 70 Fig 4 9 Windows dialog box Fig 4 10 Windows dialo...

Страница 16: ...ent Board OM13260 MCU 4 7 1 Trade Show Mode A popular use of the Fm Development Board OM13260 kit is for publicity and promotion of the I2C Bus products from NXP A version of the firmware provides Bli...

Страница 17: ...19 should it be necessary to recover from a bricked board not very likely as the MCU boot loader code is in protected memory 1 Connect a USB cable from the PC USB port to CN5 Note Two green LEDs are o...

Страница 18: ...ded in this document is subject to legal disclaimers Preliminary 1 September 6 2013 NXP B V 2013 All rights reserved 18 of 70 Fig 4 13 Fm Development Board MCU factory supplied firmware Win7 OS Fig 4...

Страница 19: ...device on the board The two busses may be linked by either a Bus Buffer Board OM13398 supplied in the kit or a wire jumper at the Port E connector CN12 The signals from both busses are available simul...

Страница 20: ...has priority A shunt Zener diode 6 2V protects the board from reverse polarity and over voltage at the DC Power connector CN6 To aid in understanding digital signal levels on the board two logic probe...

Страница 21: ...Interface Bus1 Bus2 and support circuits 5 2 1 Power Supply The Fm Development Board OM13260 operates from DC either from the USB Host connector CN5 or an optional external AC DC Power Adapter not sup...

Страница 22: ...Semiconductors UMxxxxx Install Guide All information provided in this document is subject to legal disclaimers Preliminary 1 September 6 2013 NXP B V 2013 All rights reserved 22 of 70 Fig 5 2 Power Su...

Страница 23: ...igure 5 4 USB data lines are terminated by resistors R27 and R28 and protected by an ESD network IC7 To signal to the host that the USB connection is required the USB signal DP is pulled to 3 3V via a...

Страница 24: ...2C bus 5 3 1 Bus 1 Master MCU LPC1343 Microcontroller MCU LPC1343 IC5 serves as the Bus 1 Master and the USB Bridge Firmware installed on the Fm Development Board OM13260 is stored in non volatile mem...

Страница 25: ...B V 2013 All rights reserved 25 of 70 Fig 5 6 MCU SWD Interface Section MCU Port0 and Port1 provide most of the signals used by the Fm Development Board OM13260 see figures 5 7 and 5 8 I2C Bus1 is co...

Страница 26: ...B V 2013 All rights reserved 26 of 70 Fig 5 8 IC5 MCU Port0 Fig 5 9 IC5 MCU Port1 Oscillator and Power Supply The HVQN32 package has a thermal pad ground connection and operates from the main 3 3V sup...

Страница 27: ...The Bus1 is pulled up to either the 3 3V or 5V supplies via JP13 Three different value pull up resistors are provided by jumper selection JP11 and JP12 The values of the pull up resistors are shown i...

Страница 28: ...nstant current outputs and is directly connected to the LEDs without customary series resistors The LEDs are powered directly from the 5V supply thus avoiding further power dissipation in the 3 3V lin...

Страница 29: ...ture has fallen When powered from the USB port CN5 the USB Host is typically limited to 500mA and it will shut down before the LEDs reach maximum current Operation from an external DC power supply con...

Страница 30: ...ht input output channels at CN10 Jumper JP10 sets the device address to one of four options depending whether the A0 pin is connected to GND VCC SCL or SDA Bus2 has a similar arrangement for a second...

Страница 31: ...mple 3 3V for one I2C bus 5V for the other I2C bus 5 4 1 Bus 2 Master LPC Xpresso MCU LPC1343 The LPC Xpresso Module contains an NXP LPC1343 MCU similar to the one on Bus 1 and support circuits called...

Страница 32: ...eliminary 1 September 6 2013 NXP B V 2013 All rights reserved 32 of 70 I2C Bus2 is connected to the MCU Port0 via RC edge rate control networks that provide bus fall time control SCL2 R45 and C23 SDA1...

Страница 33: ...r PCA9665 A second Bus Master is connected to Bus2 using a dedicated Bus Controller device PCA9665 Fm parallel bus to I2C bus controller IC4 The parallel port side is connected to the LPC Xpresso modu...

Страница 34: ...5 20 Bus2 Master PCA9665 Section 5 4 3 Bus 2 Pull Up Resistors The Bus2 is pulled up to either the 3 3V or 5V supplies via JP23 Three different value pull up resistors are provided by jumper selectio...

Страница 35: ...l Guide All information provided in this document is subject to legal disclaimers Preliminary 1 September 6 2013 NXP B V 2013 All rights reserved 35 of 70 Fig 5 21 Bus2 Pull Ups and Bus Voltage Select...

Страница 36: ...t is subject to legal disclaimers Preliminary 1 September 6 2013 NXP B V 2013 All rights reserved 36 of 70 Table 5 2 Bus Pull Up Resistors Strength Position Value Ohms Bus 1 SCL Bus 1 SDA Bus 2 SCL Bu...

Страница 37: ...figure 5 23 Port B Port D are identical and effectively in parallel Fig 5 23 Port A Fig 5 24 Daughter Card Connectors Port A and Port B shown 5 6 Port E The two independent I2C Buses Bus1 and Bus2 ca...

Страница 38: ...resistors of low value will overload the I2C drivers and effectively stop the bus from operating 5 6 1 Linking both Busses together with a jumper Fig 5 25 Port E with wire jumper 5 6 2 Linking both Bu...

Страница 39: ...nformation provided in this document is subject to legal disclaimers Preliminary 1 September 6 2013 NXP B V 2013 All rights reserved 39 of 70 Fig 5 27 Bus1 and Bus2 Tester connectors Fig 5 28 Bus1 Tes...

Страница 40: ...compliant using IC2 a voltage level translator See figure 5 30 This is provided for connection to I2C Bridge devices that require Serial Communications To save space on the PCB a small mini DIN conne...

Страница 41: ...ction 5 9 SPI Ports Both the Bus1 Master MCU and the Bus2 Master LPC Xpresso Module support SPI communications The Bus1 MCU has one SPI port SPI2 CN16 and the LPC Xpresso has two SPI ports SPI0 and SP...

Страница 42: ...be used as a simple Logic Probe To prevent circuit loading the LEDs are buffered by FETs as shown in figure 5 36 Green LED D6 is driven by FET Q2 when CN11 1 is at or near ground When CN11 1 is open o...

Страница 43: ...information provided in this document is subject to legal disclaimers Preliminary 1 September 6 2013 NXP B V 2013 All rights reserved 43 of 70 Fig 5 36 Logic Probe circuit Fig 5 37 Logic Probe section...

Страница 44: ...vices on the board and also the Port A Port E Daughter Card connectors These are also connected to the Master MCU IC5 on Bus 1 the Master Bus Controller IC4 and the LPC Xpresso module See figure 5 38...

Страница 45: ...on beyond the intended scope of the Fm Development Board OM13260 For example using different value pull up resistors to those supplied or other circuit experiments The Prototype area is available and...

Страница 46: ...it uses a one wire protocol it belongs to the NXP I2C Product portfolio Note The PCA9901 will be made obsolete and will not be present on future versions of the Fm Development Board OM13260 Refer to t...

Страница 47: ...e supply voltage These values correspond to the I2C logic threshold voltages for the I2C specification When a push button is pressed a logic zero is applied the channel which can be read by the GPIO d...

Страница 48: ...the comparator IC01A switches to near ground This turns on the green LED D01 Resistor R04 applies positive feedback hysteresis about 150mV to the comparator shifting the trip point to a slightly lower...

Страница 49: ...information provided in this document is subject to legal disclaimers Preliminary 1 September 6 2013 NXP B V 2013 All rights reserved 49 of 70 Fig 6 3 Window Comparator Channel0 shown Fig 6 4 Input r...

Страница 50: ...ach channel has a push switch S01 through S71 that connects the appropriate IO pin to ground when pressed Series resistors R01 through R71 limit the current in the event that the IO pin is being drive...

Страница 51: ...nd VH from the Bias Circuit A resistor divider chain R01 R02 R03 and R04 divides the supply voltage to produce one third VL one half VC and two thirds VH Each value is buffered by an op amp sections o...

Страница 52: ...2 of 70 Fig 6 7 Bias Circuit 6 2 4 Connectors The GPIO Target Board OM13303 is intended to be connected to the Fm Development Board OM13260 or other GPIO Daughter Cards via a ten pin ribbon cable Ther...

Страница 53: ...information provided in this document is subject to legal disclaimers Preliminary 1 September 6 2013 NXP B V 2013 All rights reserved 53 of 70 Fig 6 8 Connectors Fig 6 9 Ribbon cables attached to the...

Страница 54: ...Guide All information provided in this document is subject to legal disclaimers Preliminary 1 September 6 2013 NXP B V 2013 All rights reserved 54 of 70 Fig 6 10 Ribbon cables attached to the topside...

Страница 55: ...rd OM13398 The Bus Buffer Board OM13398 supplied in the kit provides a method to link both the I2C Busses on the Fm Development Board OM13260 by attachment to Port E in place of the wire jumper used e...

Страница 56: ...ent Jumpers on the Bus Buffer Board OM13398 select the voltage source of each of the two device power supplies To demonstrate the voltage level translator ability the link between the two Bus Buffers...

Страница 57: ...P3 for SDA and the low voltage or A Side of the second PCA9617A IC3 Loading capacitors C31 for SCL and C51 SDA can be placed on the low voltage section of the bus To accommodate two different footprin...

Страница 58: ...ull up resistors on this section of Bus1 are on the Fm Development Board OM13260 Fig 7 5 Bus2 Bus Buffer 7 2 3 Supply Select Jumpers The B Side high voltage side of the voltage level translator of eac...

Страница 59: ...Supply Select Jumpers 7 2 4 Variable Voltage Regulator The low voltage bus bias is generated by an LDO Low Drop Out voltage regulator IC5 The output voltage is set by resistor divider R3 R4 and R5 an...

Страница 60: ...e 7 7 and figure 7 8 The signals are arrange to be symmetrical so that the Bus Buffer Board OM13398 can be rotated 180degrees causing the signals from the Fm Development Board OM1326 to flow in the op...

Страница 61: ...s UMxxxxx Install Guide All information provided in this document is subject to legal disclaimers Preliminary 1 September 6 2013 NXP B V 2013 All rights reserved 61 of 70 Fig 7 8 Fm Development Board...

Страница 62: ...M13399 The Bridge Board OM13399 supplied in the kit provides attachment of old style with a 9 pin in line non polarized connector NXP designed I2C demo boards to the Fm Development Board OM13260 The B...

Страница 63: ...t connector had only one I2C Bus with SCL and SDA signals The Fm Development Board Daughter Card ports have two I2C Buses Bus1 and Bus2 signals One or other I2C Bus can be selected by jumpers The powe...

Страница 64: ...red by a third party tool see section 8 The Tester socket provides 5V and the Fm Development Board OM13260 provides both 3 3V or 5V Jumper JP1 selects the source of the 5V power JP2 selects either 3 3...

Страница 65: ...2C signals and available 5V power are connected Note The Tester s bus signals are connected to the two 9 position connectors and depending upon the position of JP2 and JP3 to the Fm Development Board...

Страница 66: ...SDA there are weak pull ups R3 R4 These may be replaced with lower value resistors or removed as needed 8 3 Example using PCA9632 OM13269 Fig 8 6 Bridge Board OM13399 used to attach a PCA9632 OM13269...

Страница 67: ...easily achieved with third party development tools from Total Phase http www totalphase com See figure 9 1 and figure 9 2 There are two tools called Aardvark and Beagle that direct connect to the Fm...

Страница 68: ...ave See figure 9 3 Fig 9 3 Aardvark I2C SPI Control Center The Aardvark operates with supplied software called Control Center It can be configured as either an I2C Master or I2C Slave See figure 9 3 T...

Страница 69: ...of all traffic on an I2C Bus See figure 8 4 Fig 8 4 Aardvark I2C SPI Control Center The Beagle operates with supplied software called Data Center See figure 8 3 The Beagle I2C SPI Protocol Analyzer ha...

Страница 70: ...ny assistance with applications or customer product design It is customer s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer s applications...

Страница 71: ......

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