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NXP Semiconductors
UMxxxxx
Install Guide
All information provided in this document is subject to legal disclaimers.
Preliminary 1
— September 6, 2013
© NXP B.V. 2013. All rights reserved.
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5. Fm+ Development Board (OM13260)
The Fm+ Development Board (OM13260) PCB assembly is self-contained, requiring only DC power to
operate. Depending upon the firmware installed on the Fm+ Development Board (OM13260) it can
also operate with a connected Personal Computer (PC) via a USB cable.
The modular design of the kit and this board in particular allows accessory boards to be easily
connected.
5.1
Theory of Operation
Fig 5.1 Fm+ Development Board Bus Structure
An I2C Bus requires a Master and one or more Slaves. The two bus signals; clock SCL and data SDA, are
Wired-OR and require pull ups to a DC power supply. Two similar but separate I2C busses each support
one Master and at least one Slave device on the board. The two busses may be linked by either a Bus
Buffer Board (OM13398 supplied in the kit) or a wire jumper, at the Port E connector (CN12).
The signals from both busses are available simultaneously at each of four connectors, Port A through
Port D (CN1 through CN4 respectively). These are intended for attachment of accessory Daughter
Cards, which will be made available as future I2C devices are released.
The size of the pull up resistors can be changed by moving shorting jumpers (JP1, JP2, JP11, and JP12),
providing selection of ‘Low’ ‘Med’ and ‘High’ resistor values scaled to the Fm+ I2C Bus drive strength.
When both busses are joined by a jumper wire the pull ups are effectively in parallel, and have one half
the stated resistance values.
Operating voltage of the I2C Bus depends upon the shorting jumpers (JP13 and JP23) that select either
3.3V or 5V connected to the pull up resistors. Compliant I2C devices can tolerate 5.5V (max) regardless
of the device operating voltage.
Each bus has a GPIO eight bit Slave device (PCA9672, IC10 and IC20), and Bus 1 also has an LED Driver
Содержание OM13260
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