LPC5411x
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© NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet
Rev. 2.1 — 9 May 2018
101 of 105
NXP Semiconductors
LPC5411x
32-bit ARM Cortex-M4/M0+ microcontroller
LPC5411x v.1.3
20160325
Product data sheet
-
LPC5411x v.1.2
Modifications:
•
Updated Figure 38 “LQFP64 Soldering footprint”.
LPC5411x v.1.2
20160224
Product data sheet
-
LPC5411x v.1.1
Modifications:
•
Updated Table 34 “Dynamic characteristics” on page 76: V
DD
= 1.62 V to 3.6 V and table note is:
Based on simulated values and for 2.7 V to 3.6 V.
•
Added Figure 11 “Deep-sleep mode: Typical supply current IDD versus temperature for different
supply voltages VDD” on page 53 and Figure 12 “Deep power-down mode: Typical supply
current IDD versus temperature for different supply voltages VDD” on page 54.
LPC5411x v.1.1
20160222
Product data sheet
-
LPC5411x v.1
Modifications:
•
Fixed graphic numbers.
•
Updated Table 2 “Ordering options” on page 5.
•
Updated the list item in Section 2 “Features and benefits”: ROM-based USB drivers (HID, CDC,
and MSC).
•
Updated Figure 6 “LPC5411x Memory mapping” on page 26 to include 128 KB on-chip flash and
a note: The total size of flash and SRAM is part dependent.
•
Added Section 7.21.1.4 “RTC Oscillator” on page 41.
•
Updated figure note of Figure 9 “Typical CoreMark score” on page 49 to include “all peripherals
disabled.”
•
Added table description: T
amb
=
40
C to +105
C, unless otherwise specified.1.62 V
V
DD
3.6 V to Table 15 “Static characteristics: Power consumption in sleep mode” on page 51.
•
Moved Figure 10 “CoreMark power consumption: typical mA/MHz for M4 and M0+ cores” after
Table 15 “Static characteristics: Power consumption in sleep mode” on page 51.
•
Updated table notes to Table 18 “Typical peripheral power consumption[1][2][3]” on page 54.
•
Added Table 19 “Typical AHB/APB peripheral power consumption [3][4][5]” on page 54.
•
Removed table note: The values specified are simulated and absolute values, including
package/bondwire capacitance from “Weak input pull-up/pull-down characteristics” heading of
Table 20 “Static characteristics: pin characteristics” on page 56.
•
Renamed PLL0 to PLL. See Table 24 “PLL lock times and current” on page 64.
•
Added table description: T
amb
=
40
C to +105
C. V
DD
= 1.62 V to 3.6 V to Table 25 “Dynamic
characteristics of the PLL[1]” on page 65.
•
Changed the symbol in Table 26 “Dynamic characteristic: FRO” on page 65 to f
osc(FRO)
.
•
Added table note: Typical ratings are not guaranteed to Table 30 “Dynamic characteristics:
I2S-bus interface pins [1][4]”, Table 31 “SPI dynamic characteristics[1]” on page 71, and Table 32
“USART dynamic characteristics[1]” on page 74.
•
Updated footnote to: data based on characterization results, not tested in production. See Table
26 “Dynamic characteristic: FRO” on page 65.
•
Changed the order of the conditions for E
D
and E
L(adj)
in Table 37 “12-bit ADC static
characteristics” on page 79.
LPC5411x v.1
20160216
Product data sheet
-
-
Table 43.
Revision history
…continued
Document ID
Release date Data sheet status
Change notice
Supersedes
