NXP Semiconductors K53 Series, Справочное руководство

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LPTMRx_PSR field descriptions (continued)
Field Description
6–3
PRESCALE
Prescale Value
The Prescaler Value register field configures the size of the Prescaler (in Time Counter mode) or width of
the Glitch Filter (in Pulse Counter mode). The Prescale Value should only be altered when the LPTMR is
disabled.
0000 Prescaler divides the prescaler clock by 2; Glitch Filter does not support this configuration.
0001 Prescaler divides the prescaler clock by 4; Glitch Filter recognizes change on input pin after 2
rising clock edges.
0010 Prescaler divides the prescaler clock by 8; Glitch Filter recognizes change on input pin after 4
rising clock edges.
0011 Prescaler divides the prescaler clock by 16; Glitch Filter recognizes change on input pin after 8
rising clock edges.
0100 Prescaler divides the prescaler clock by 32; Glitch Filter recognizes change on input pin after 16
rising clock edges.
0101 Prescaler divides the prescaler clock by 64; Glitch Filter recognizes change on input pin after 32
rising clock edges.
0110 Prescaler divides the prescaler clock by 128; Glitch Filter recognizes change on input pin after 64
rising clock edges.
0111 Prescaler divides the prescaler clock by 256; Glitch Filter recognizes change on input pin after 128
rising clock edges.
1000 Prescaler divides the prescaler clock by 512; Glitch Filter recognizes change on input pin after 256
rising clock edges.
1001 Prescaler divides the prescaler clock by 1024; Glitch Filter recognizes change on input pin after
512 rising clock edges.
1010 Prescaler divides the prescaler clock by 2048; Glitch Filter recognizes change on input pin after
1024 rising clock edges.
1011 Prescaler divides the prescaler clock by 4096; Glitch Filter recognizes change on input pin after
2048 rising clock edges.
1100 Prescaler divides the prescaler clock by 8192; Glitch Filter recognizes change on input pin after
4096 rising clock edges.
1101 Prescaler divides the prescaler clock by 16384; Glitch Filter recognizes change on input pin after
8192 rising clock edges.
1110 Prescaler divides the prescaler clock by 32768; Glitch Filter recognizes change on input pin after
16384 rising clock edges.
1111 Prescaler divides the prescaler clock by 65536; Glitch Filter recognizes change on input pin after
32768 rising clock edges.
2
PBYP
Prescaler Bypass
When the Prescaler Bypass is set the selected prescaler clock (in Time Counter mode) or selected input
source (in Pulse Counter mode) directly clocks the LPTMR Counter Register. When the Prescaler Bypass
is clear, the LPTMR Counter Register is clocked by the output of the prescaler/glitch filter. The Prescaler
Bypass should only be altered when the LPTMR is disabled.
0 Prescaler/Glitch Filter is enabled.
1 Prescaler/Glitch Filter is bypassed.
1–0
PCS
Prescaler Clock Select
The Prescaler Clock Select selects the clock to be used by the LPTMR prescaler/glitch filter. The
Prescaler Clock Select should only be altered when the LPTMR is disabled. The clock connections vary
by device. See the Chip Configuration details for information on the connections to these inputs.
Table continues on the next page...
Memory map and register definition
K53 Sub-Family Reference Manual, Rev. 6, Nov 2011
1108 Freescale Semiconductor, Inc.