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MPC5668EVB Users Manual Rev 0.1 May 2009
MPC5668EVBUM/D Page 23 of 29
The Phantom port
circuitry is located on the
bottom edge of the EVB
3.11 Phantom Ports (J76, J77,
J78, J79, J80)
To support the de-serialisation feature of the MPC5668 DSPI module, the EVB features 4 chained SIPO shift
registers interfaced to DSPI A. This allows a 32-bit phantom port to be created. The port can operate at either
5V or 3.3V depending on the VDDE2 supply voltage (J42). This is outputted on P24 and P25. Please refer to
the MPC5668 Reference manual for guideline on how to create software to interface to the phantom part.
Five jumpers are used to allow the signals and power to be isolated from the phantom port circuitry. These are
detailed in table x below.
Table 3-24 Phantom Port Control (J35, J36, J55)
Jumper Position PCB Legend Description
J76
FITTED (D)
CLK
PF0 DSPI A CLK is connected to the phantom port
circuitry.
REMOVED PF0 DSPI A CLK is disconnected from the phantom
port circuitry.
J77
FITTED (D)
SREG PWR
VDDE2 Domain power is applied to the 4 shift
registers (U15, U16, U21, U22)
REMOVED No power is applied to the 4 shift registers (U15,
U16, U21, U22)
J78
FITTED (D)
IN
PF1
DSPI_A Serial Data Out
is connected to the
phantom port circuitry.
REMOVED PF1
DSPI_A Serial Data Out
is disconnected from the
phantom port circuitry.
J79
FITTED (D)
CLR
PF11 is connected to the phantom port circuitry.
Allows for software to reset the Shift registers.
REMOVED PF11 is disconnected from the phantom port
circuitry.
J80
FITTED (D)
OUT
PF3 DSPI A PCS is connected to the phantom port
circuitry.
REMOVED PF3 DSPI A PCS is disconnected from the phantom
port circuitry.