NXP Semiconductors freescale MPC5668E Скачать руководство пользователя страница 13

MPC5668EVB Users Manual Rev 0.1

 

 

        

  May 2009 

MPC5668EVBUM/D  

                               Page 9 of 29 

 

The

 MCU clock 

control jumpers are 
located close to 
crystal oscillator 
modules.  

 

 
 
 

3.2  MCU Clock Control  

3.2.1  Main Clock Selection (J85, J87, J61 and J66) 

 
The EVB supports three possible MCU clock sources: 
 

(1)  The local 40MHz ALC pierce oscillator circuit 
(2)  An oscillator module on the EVB (U20), driving the MCU EXTAL signal 
(3)  An external clock input to the EVB via the SMA connector (P32), driving the MCU EXTAL signal 

 
The clock circuitry is shown in the diagram below. Please refer to the appropriate daughter card user manual 
for specific jumper numbers and circuitry. 

 
 

 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 

Figure 3-5   EVB Clock Selection 

 

Table 3-5   Clock Source Jumper Selection 

Jumper  

Position 

PCB 
Legend 

Description 

J85 (U20 PWR)

 

FITTED 

(D)

 

 

EVB oscillator module U20 is powered 

REMOVED

 

 

 

EVB oscillator module U20 is not 
powered 

J87 (OSC SEL)

 

1-2 

(D)

 

MOD 

Daughter card EXT-CLK is routed from 
U20 

2-3 

SMA 

Daughter card EXT-CLK is routed from 
P32 SMA Connector 

J66  
Must Match J61 

1-2 

(D)

 

Y2 

MCU Clock is Y2 

 

2-3 

GND 

MCU Clock is Selected by J87 

J61 
Must Match J66 

1-2 

(D)

 

Y2 

MCU Clock is Y2

 

2-3 

EVB 

MCU Clock is Selected by J87 

 
 Note that the 3.3V regulator must be enabled when using oscillator module Y1.  
 
 

CAUTION

 

The MPC5668 clock circuitry is all 3.3v based. Any external clock signal driven into the SMA connector must 
have a maximum voltage of 3.3V.  
 
 

J85 

SMA 

(P32) 

Oscillator 

Module 

(U20) 

3.3V_SR 

Local Crystal 

Circuit (Y2) 

MCU 

 
EXTAL 
 
 
XTAL 

 

J87 

J66 

J61 

GND 

EVB Clock Circuitry 

Содержание freescale MPC5668E

Страница 1: ...MPC5668EVB Users Manual Revision 0 1 May 2009...

Страница 2: ...rating parameters including Typicals must be validated for each customer application by customer s technical experts Freescale Semiconductor does not convey any license under its patent rights nor the...

Страница 3: ...3 4 ONCE AND NEXUS CONFIGURATION J32 J70 13 3 4 1 Debug Connector Pinouts 14 3 5 CAN CONFIGURATION J20 J21 J29 J30 J31 15 3 6 RS232 CONFIGURATION J6 J17 J18 J23 J24 16 3 7 LIN CONFIGURATION J3 J4 J5 J...

Страница 4: ...13 TABLE 3 11 JTAG NEXUS TARGET RESET ROUTING 13 TABLE 3 12 ONCE NEXUS TCLK TERMINATION CONTROL 13 TABLE 3 13 NEXUS DEBUG CONNECTOR PINOUT 14 TABLE 3 14 CAN CONTROL JUMPERS J30 J31 J7 15 TABLE 3 15 RS...

Страница 5: ...668 family of microprocessors and to facilitate hardware and software development At the time of writing this document the MPC5668 family is offered in a 208MAPBGA package A 256MAPBGA package supporti...

Страница 6: ...male connector PC RS 232 compliant via a Maxim physical interface SCI channels C and D can be routed to LIN interface header 0 1 and molex connectors both will full physical transceivers FlexCAN chann...

Страница 7: ...way jumpers have been aligned such that Pin 1 is either to the top or to the left of the jumper On 2 way jumpers the source of the signal is connected to Pin 1 The EVB has been designed with ease of u...

Страница 8: ...s connector should be used to connect the supplied wall plug mains adapter Note if a replacement or alternative adapter is used care must be taken to ensure the 2 1mm plug uses the correct polarisatio...

Страница 9: ...Enabled J83 5 0V FITTED DISABLE 5 0V switching regulator output is Disabled REMOVED D 5 0V switching regulator output is Enabled J84 5 0V LINEAR FITTED D ENABLE 5 0V linear regulator output is Enable...

Страница 10: ...CU regulators to be disabled by changing VRCSEL to EXT and applying external voltages to the VDDSYN and VDD33 inputs When in 3 3v mode VDDSYN and VDD33 inputs must always be supplied externally The VD...

Страница 11: ...D D MCU VDD33 pin is not powered externally J50 VDDSYN FITTED MCU VDDSYN pin is powered from switching regulator REMOVED D MCU VDDSYN pin is not powered externally 3 3v 2 5V J45 VDDEMLB 1 2 D 2 5V MCU...

Страница 12: ...while considering if any of the EVB components or peripherals you require will be affected Table 3 4 details a list of the various EVB components and peripherals powered by the regulators Table 3 4 Po...

Страница 13: ...B Clock Selection Table 3 5 Clock Source Jumper Selection Jumper Position PCB Legend Description J85 U20 PWR FITTED D EVB oscillator module U20 is powered REMOVED EVB oscillator module U20 is not powe...

Страница 14: ...using the 32KHz crystal PA 14 and PA 15 will not be visible on P17 Port A header Figure 3 6 EVB Clock Selection Table 3 6 32Khz Crystal Jumper Selection Jumper Position PCB Legend Description J67 Mus...

Страница 15: ...Table 3 8 LVI Control Jumpers Jumper Position PCB Legend Description J75 Posn 1 2 FITTED D 5 0V switching regulator is monitored Reset switch active REMOVED 5 0V switching regulator is not monitored R...

Страница 16: ...of an AND gate and then converted to an open drain output which is directly connected to the MCU reset pin Reset Out The MCU reset pin is buffered to provide a reset out signal capable of driving the...

Страница 17: ...w Some debug probes have the ability to assert and also monitor the state of the MCU reset line This is not possible when the reset signal is buffered so a jumper J32 is included to allow routing the...

Страница 18: ...ction Pin No Function Connection 1 Reserved 2 Reserved 3 Reserved 4 Reserved 5 MDO 9 MCU M5 6 CLKOUT MCU PK9 7 Vendor I O 2 TP25 8 MDO 8 MCU L5 9 Reset In Reset CCT 10 EVTI MCU M11 11 TDO MCU M3 12 VR...

Страница 19: ...J7 Jumper Position PCB Legend Description J30 Posn 1 2 FITTED D 5v is applied to both CAN transceivers VCC REMOVED No 5v power is applied to CAN transceivers J30 Posn 3 4 FITTED D 12v Power is applie...

Страница 20: ...ace as described below There is also a global power jumper J9 controlling the power to the RS232 transceiver Table 3 15 RS232 Control Jumpers Jumper Position PCB Legend Description J6 SCI PWR FITTED D...

Страница 21: ...e mode as defined in the table below Table 3 16 LIN Control Jumpers Jumper Position PCB Legend Description J5 LIN C M FITTED D LIN C transceiver is configured for LIN Master mode REMOVED LIN C transce...

Страница 22: ...FITTED D TXEN MCU PK8 is connected to Flexray B transceiver TXEN REMOVED MCU PK8 is not connected to Flexray B transceiver TXEN J27 Flex B Posn 5 6 FITTED D RX MCU PK6 is connected to Flexray B trans...

Страница 23: ...xray B interface BGE signal is pulled to VIO REMOVED Flexray B interface BGE signal is unterminated J28 Flex B Posn 3 4 FITTED D EN Flexray B interface EN signal is pulled to VIO REMOVED Flexray B int...

Страница 24: ...ports G and H Table 3 20 Pull up Pull down resistors on Ports G and H for Ethernet Physical Port Pin Pull Direction Strength PG 9 Down GND 2 2k PG 7 Up 3 3v SR 1 5k PG 12 Down GND 2 2k PG 13 Down GND...

Страница 25: ...supplies domains referred to in this table are for the Flash based INIC Please refer to the schematics to see how this affects the supply domains of the ROM INIC if it has been fitted Table 3 22 INIC...

Страница 26: ...to the EVB INIC 2 3 INIC150 PSO is Routed to the MOST150 header J39 MLBDAT 1 2 D EVB MLBDAT is Routed to the EVB INIC 2 3 INIC150 MLBDAT is Routed to the MOST150 header J40 SDA 1 2 D EVB SDA is Routed...

Страница 27: ...detailed in table x below Table 3 24 Phantom Port Control J35 J36 J55 Jumper Position PCB Legend Description J76 FITTED D CLK PF0 DSPI A CLK is connected to the phantom port circuitry REMOVED PF0 DSPI...

Страница 28: ...tions for example the Nexus and External bus as shown by the shaded boxes in the table below Table 4 1 EVB MCU Pin Usage Function Port A Port B Port C Port D Port E Port F Port G Port H Port J Port k...

Страница 29: ...ED LIN C RX LIN C RX from MCU Connected to LIN Interface J16 LIN C FITTED LIN C EN LIN D Bus Enable Physical Interface J17 SCI A FITTED SCI A RX MCU RXD A is routed to MAX3223 J18 SCI A FITTED SCI A T...

Страница 30: ...1 2 FITTED VCC 5v is applied to both CAN transceivers VCC J30 CAN Posn 3 4 FITTED VIO Power is applied to both CAN transceivers VIO J31 CAN A Posn 1 2 FITTED TX MCU CNTX A is connected to CAN control...

Страница 31: ...J69 BOOT CFG 1 2 FLASH MCU boots from internal flash J70 TCLK PULL 1 2 VDDE2 JTAG NEXUS TCLK signal is pulled to VDDE2 via 10K J71 32KHz CLK 1 2 Y3 32Khz Crystal Y2 is connected to MCU J72 Not Implem...

Страница 32: ...he EVB core voltages to be monitors by the ATD J74 allows the 2 5v 3 3v and 5v Switcher and Linear regulator outputs to be connected to the ATD inputs J73 allows the 12v EVB supply to be monitored via...

Страница 33: ...ort C Connector Pinout P19 Pin Function Pin Function GPIO 1st Alt GPIO 1st Alt 1 PC0 AN32 2 PC1 AN33 3 PC2 AN34 4 PC3 AN35 5 PC4 AN36 6 PC5 AN37 7 PC6 AN38 8 PC7 AN39 9 PC8 AN40 10 PC9 AN41 11 PC10 AN...

Страница 34: ...10 SIN_C 12 PF11 PCS_C 0 13 PF12 SCK_D 14 PF13 SOUT_D 15 PF14 SIN_D 16 PF15 PCS_D 0 17 GND 18 GND 6 1 7 Port G DSPI eMIOS FEC P27 Table 6 8 Port F Connector Pinout P27 Pin Function Pin Function GPIO 1...

Страница 35: ...9 8 PJ7 eMIOS 8 9 PJ8 eMIOS 7 10 PJ9 eMIOS 6 11 PJ10 eMIOS 5 12 PJ11 eMIOS 4 13 PJ12 eMIOS 3 14 PJ13 eMIOS 2 15 PJ14 eMIOS 1 16 PJ15 eMIOS 0 17 GND 18 GND 6 1 10 Port K RESET MLB Connector P30 Table 6...

Страница 36: ...prototyping area are connected to the CAN C F pins of the MCU as well as power and the DB9 connectors This allows an additional 4 CAN physical interfaces to be added to the EVB for evaluation with the...

Страница 37: ...MPC5668EVB Users Manual Rev 0 1 May 2009 MPC5568EVBUM D Page A 1 Appendix A EVB Schematics...

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